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NL37WZ14_06

更新时间: 2024-11-12 03:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
5页 75K
描述
Triple Schmitt−Trigger Inverter

NL37WZ14_06 数据手册

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NL37WZ14  
Triple Schmitt−Trigger  
Inverter  
The NL37WZ14 is a high performance triple inverter with  
Schmitt−Trigger inputs operating from a 1.65 to 5.5 V supply.  
Pin configuration and function are the same as the NL37WZ04, but  
the inputs have hysteresis, and with its Schmitt trigger function, the  
NL37WZ14 can be used as a line receiver which will receive slow  
input signals. The NL37WZ14 is capable of transforming slowly  
changing input signals into sharply defined, jitter−free output signals.  
In addition, it has a greater noise margin than conventional inverters.  
The NL37WZ14 has hysteresis between the positive−going and the  
negative−going input thresholds (typically 1.0 V) which is determined  
internally by transistor ratios and is essentially insensitive to  
temperature and supply voltage variations.  
http://onsemi.com  
MARKING  
DIAGRAM  
8
US8  
US SUFFIX  
CASE 493  
LA M G  
8
G
1
Features  
1
Designed for 1.65 V to 5.5 V V Operation  
CC  
Over Voltage Tolerant Inputs and Outputs  
LA  
M
G
= Device Code  
= Date Code*  
= Pb−Free Package  
LVTTL Compatible − Interface Capability with 5 V TTL Logic  
with V = 3 V  
CC  
(Note: Microdot may be in either location)  
*Date Code orientation may vary depending upon  
manufacturing location.  
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current Substantially Reduces System  
Power Requirements  
PIN ASSIGNMENT  
Current Drive Capability is 24 mA at the Outputs  
1
2
IN A1  
Chip Complexity: FET = 94  
Pb−Free Package is Available  
OUT Y3  
IN A2  
3
4
5
GND  
IN A1  
1
2
8
7
V
CC  
OUT Y2  
IN A3  
6
7
8
OUT Y3  
OUT Y1  
IN A3  
OUT Y1  
V
CC  
IN A2  
GND  
3
4
6
5
FUNCTION TABLE  
A Input  
Y Output  
OUT Y2  
L
H
L
H
Figure 1. Pinout (Top View)  
ORDERING INFORMATION  
1
IN A1  
OUT Y1  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
IN A2  
IN A3  
1
OUT Y2  
OUT Y3  
1
Figure 2. Logic Symbol  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 6  
NL37WZ14/D  

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