Datasheet > NL37WZ16_12

NL37WZ16_12

更新时间： 2024-09-25 12:22:51

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
5页	105K
描述
Triple Buffer

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中文翻译

获取价格

数据手册

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NL37WZ16_12 数据手册

NL37WZ16

Triple Buffer

The NL37WZ16 is a high performance buffer with inputs operating

from a 1.65 to 5.5 V supply.

The NL37WZ16 can be used as a line receiver which will receive

slow input signals.

Features

http://onsemi.com

MARKING

• Designed for 1.65 V to 5.5 V V Operation

• Over Voltage Tolerant Inputs and Outputs

DIAGRAM

• LVTTL Compatible − Interface Capability with 5 V TTL Logic

with V = 3 V

• LVCMOS Compatible

LR M G

• 24 mA Balanced Output Sink and Source Capability

US8

US SUFFIX

CASE 493

• Near Zero Static Supply Current Substantially Reduces System

Power Requirements

• Current Drive Capability is 24 mA at the Outputs

• Chip Complexity: FET = 94

• These Devices are Pb−Free and are RoHS Compliant

= Device Code

= Date Code*

= Pb−Free Package

(Note: Microdot may be in either location)

*Date Code orientation may vary depending upon

manufacturing location.

IN A1

OUT Y3

IN A2

PIN ASSIGNMENT

OUT Y1

IN A3

Function

IN A1

OUT Y3

IN A2

GND

OUT Y2

IN A3

GND

OUT Y2

OUT Y1

Figure 1. Pinout (Top View)

FUNCTION TABLE

IN A1

OUT Y1

OUT Y2

OUT Y3

A Input

Y Output

IN A2

IN A3

ORDERING INFORMATION

Figure 2. Logic Symbol

†

Device

NL37WZ16USG

Package

Shipping

US8

3000/Tape & Reel

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

Publication Order Number:

April, 2012 − Rev. 7

NL37WZ16/D

12 3 4 5

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