Datasheet > NL17SH17

NL17SH17

更新时间： 2024-10-01 01:21:59

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
5页	102K
描述
Single Schmitt-Trigger Inverter

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NL17SH17 数据手册

NL17SH17

Single Schmitt-Trigger

Buffer

The NL17SH17 is a single gate CMOS Schmitt−trigger

non−inverting buffer fabricated with silicon gate CMOS technology.

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output. The

NL17SH17 input structure provides protection when voltages up to 7

V are applied, regardless of the supply voltage. This allows the

NL17SH17 to be used to interface 5 V circuits to 3 V circuits.

The NL17SH17 can be used to enhance noise immunity or to square

up slowly changing waveforms.

http://onsemi.com

MARKING

DIAGRAM

SOT−953

CASE 527AE

Features

• High Speed: t = 4.0 ns (Typ) at V = 5.0 V

= Specific Device Code

(Rotated 90°)

= Month Code

• Low Power Dissipation: I = 1.0 mA (Max) at T = 25°C

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FETs = 101

PIN ASSIGNMENT

IN A

GND

• These Devices are Pb−Free and are RoHS Compliant

OUT Y

IN A

GND

FUNCTION TABLE

Input A

Output Y

OUT Y

Figure 1. Pinout

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

IN A

OUT Y

Figure 2. Logic Symbol

Publication Order Number:

September, 2012 − Rev. 0

NL17SH17/D

12 3 4 5

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NL17SHT04	ONSEMI	获取价格	Inverting Buffer CMOS Logic Level Shifter
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NL17SHT08	ONSEMI	获取价格	2-Input AND Gate / CMOS Logic Level Shifter