Datasheet > NL17SHT32

NL17SHT32

更新时间： 2024-10-01 01:20:03

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
5页	104K
描述
2-Input OR Gate CMOS Logic Level Shifter

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NL17SHT32 数据手册

NL17SHT32

2-Input OR Gate /

CMOS Logic Level Shifter

The NL17SHT32 is an advanced high speed CMOS 2−input OR

gate fabricated with silicon gate CMOS technology. It achieves high

speed operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

http://onsemi.com

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input protection

circuitry on this device allows overvoltage tolerance on the input,

allowing the device to be used as a logic−level translator from 3 V

CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V

CMOS Logic while operating at the high−voltage power supply.

The NL17SHT32 input structure provides protection when voltages

up to 7 V are applied, regardless of the supply voltage. This allows the

NL17SHT32 to be used to interface 5 V circuits to 3 V circuits. The

MARKING

DIAGRAM

SOT−953

CASE 527AE

= Specific Device Code

= Month Code

output structures also provide protection when V = 0 V. These input

PIN ASSIGNMENT

and output structures help prevent device destruction caused by supply

voltage − input/output voltage mismatch, battery backup, hot

insertion, etc.

IN A

GND

IN B

Features

OUT Y

• High Speed: t = 3.5 ns (Typ) at V = 5 V

• Low Power Dissipation: I = 2 mA (Max) at T = 25°C

• TTL−Compatible Inputs: V = 0.8 V; V = 2 V

FUNCTION TABLE

• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load

Inputs

Output

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic Families

• These are Pb−Free Devices

IN A

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

GND

OUT Y

IN B

Figure 1. Pinout (Top View)

≥ 1

IN A

IN B

OUT Y

Figure 2. Logic Symbol

Publication Order Number:

August, 2011 − Rev. 0

NL17SHT32/D

12 3 4 5

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与NL17SHT32相关器件

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NL17SHT32P5T5G	ONSEMI	获取价格	2-Input OR Gate CMOS Logic Level Shifter
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NL17SV00XV5T2G	ONSEMI	获取价格	Single 2-Input NAND Gate
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NL17SV02XV5T2	ONSEMI	获取价格	Single 2-Input NOR Gate
NL17SV02XV5T2G	ONSEMI	获取价格	Single 2-Input NOR Gate
NL17SV04	ONSEMI	获取价格	Single Inverter
NL17SV04XV5T2	ONSEMI	获取价格	Single Inverter
NL17SV04XV5T2G	ONSEMI	获取价格	Single Inverter