NL17SV32XV5T2
Single Gate 2−Input OR Gate
The NL17SV32 is an ultra−high performance 2 input OR gate
manufactured in 0.35 m CMOS technology with excellent
performance down to 0.9 V. This device is ideal for extremely
high−speed and high−drive applications. Additionally, limitations of
board space are no longer a constraint. The very small SOT−553
makes this device fit most tight designs and spaces.
http://onsemi.com
Features
MARKING
DIAGRAM
• Extremely High Speed: t = 1.0 ns (Typ) at V = 3.3 V
PD
CC
• Designed for 0.9 to 3.3 V Operation
UM MG
• Overvoltage Tolerance (OVT)* Input Pins Permit Logic Translation
• Balanced "24 mA Output Drive @ 3.3 V
• Near Zero Static Supply Current
• Ultra−Tiny SOT−553 5 Pin Package Only 1.6 x 1.6 x 0.6 mm
• These are Pb−Free Devices
SOT−553
CASE 463B
G
UM
M
A
= Device Code
= Date Code*
= Assembly Location
= Year
Y
Typical Applications
• Cellular
• Digital Camera
• PDA
• Digital Video
W
G
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN DIAGRAM
Important Information
5
4
V
Y
A
B
1
2
3
CC
• High ESD Ratings for Handling:
Human Body Model: 2000 V
Machine Model: 200 V
• Latchup Max Rating: 500 mA
GND
Industry Standard
• Compatible with Fairchild’s NC7SV32 and TI’s SN74AUC1G32
FUNCTION TABLE
PIN ASSIGNMENT
1
2
3
4
5
Input
Input
GND
A
Input A
Input B
Output Y
B
L
L
H
H
L
H
L
L
H
H
H
−
Output
Y
H
V
CC
−
*Overvoltage Tolerance (OVT) enables input pins to function outside (higher) of
their operating voltages, with no damage to the devices or to signal integrity.
ORDERING INFORMATION
IN A
Device
NL17SV32XV5T2
Package
Shipping†
w1
OUT Y
IN B
SOT−553* 4000 Tape & Reel
NL17SV32XV5T2G SOT−553* 4000 Tape & Reel
Figure 1. Logic Symbol
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*This package is inherently Pb−Free.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
September, 2005 − Rev. 2
NL17SV32XV5T2/D