NBSG53ABAR2G

更新时间： 2024-11-19 13:11:59

品牌	Logo	应用领域
安森美 - ONSEMI		时钟驱动器触发器逻辑集成电路
页数	文件大小	规格书
18页	135K
描述
53 SERIES, LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA16, 4 X 4 MM, PLASTIC, FCBGA-16

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技术参数
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NBSG53ABAR2G 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	4 X 4 MM, PLASTIC, FCBGA-16
针数：	16	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.69
Is Samacsys：	N	其他特性：	NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V
系列：	53	输入调节：	DIFFERENTIAL
JESD-30 代码：	S-PBGA-B16	长度：	4 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	功能数量：	1
反相输出次数：		端子数量：	16
实输出次数：	1	最高工作温度：	70 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LBGA	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
传播延迟（tpd）：	0.275 ns	认证状态：	Not Qualified
座面最大高度：	1.4 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	2.375 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	温度等级：	OTHER
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	4 mm	Base Number Matches：	1

NBSG53ABAR2G 数据手册

NBSG53A

2.5V/3.3VꢀSiGe Selectable

Differential Clock and Data

D Flip−Flop/Clock Divider

with Reset and OLS*

http://onsemi.com

MARKING

The NBSG53A is a multi−function differential D flip−flop (DFF) or

fixed divide by two (DIV/2) clock generator. This is a part of the

GigaComm

family of high performance Silicon Germanium

DIAGRAM**

products. A strappable control pin is provided to select between the

two functions. The device is housed in a low profile 4x4 mm 16−pin

Flip−Chip BGA (FCBGA) or a 3x3 mm 16 pin QFN package.

The NBSG53A is a device with data, clock, OLS, reset, and select

inputs. Differential inputs incorporate internal 50 W termination

resistors and accept NECL (Negative ECL), PECL (Positive ECL),

LVCMOS/LVTTL, CML, or LVDS. The OLS input is used to

program the peak−to−peak output amplitude between 0 and 800 mV

in five discrete steps. The RESET and SELECT inputs are

single−ended and can be driven with either LVECL or

LVCMOS/LVTTL input levels.

53A

LYW

FCBGA−16

BA SUFFIX

CASE 489

SG53A

ALYW

Data is transferred to the outputs on the positive edge of the clock.

The differential clock inputs of the NBSG53A allow the device to also

be used as a negative edge triggered device.

QFN−16

MN SUFFIX

CASE 485G

A = Assembly Location

L = Wafer Lot

• Maximum Input Clock Frequency (DFF) > 8 GHz Typical

(See Figures 4, 6, 8, 10, and 11)

Y = Year

W = Work Week

• Maximum Input Clock Frequency (DIV/2) > 10 GHz Typical

(See Figures 5, 7, 9, 10, and 11)

**For further details, refer to Application

Note AND8002/D

• 210 ps Typical Propagation Delay (OLS = FLOAT)

• 45 ps Typical Rise and Fall Times (OLS = FLOAT)

• DIV/2 Mode (Active with Select Low)

• DFF Mode (Active with Select High)

Board

Description

NBSG53ABAEVB NBSG53ABA Evaluation Board

• Selectable Swing PECL Output with Operating Range: V = 2.375 V

to 3.465 V with V = 0 V

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 16 of this data sheet.

• Selectable Swing NECL Output with NECL Inputs with

Operating Range: V = 0 V with V = −2.375 V to −3.465 V

• Selectable Output Level (0 V, 200 mV, 400 mV, 600 mV, or 800 mV

Peak−to−Peak Output)

• 50 W Internal Input Termination Resistors on all Differential Inputs

*Output Level Select

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

March, 2004 − Rev. 5

NBSG53A/D

12 3 4 5 6 7...18

中文翻译

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与NBSG53ABAR2G相关器件

型号	品牌	获取价格	描述	数据表
NBSG53AMA1TBG	ONSEMI	获取价格	53 SERIES, LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA16, 4 X 4 MM
NBSG53AMAG	ONSEMI	获取价格	暂无描述
NBSG53AMAHTBG	ONSEMI	获取价格	53 SERIES, LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA16, 4 X 4 MM
NBSG53AMN	ONSEMI	获取价格	2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset
NBSG53AMNG	ONSEMI	获取价格	2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with
NBSG53AMNHTBG	ONSEMI	获取价格	2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider
NBSG53AMNR2	ONSEMI	获取价格	2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset
NBSG53AMNR2G	ONSEMI	获取价格	2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with
NBSG53MN	ONSEMI	获取价格	LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16, 3 X 3 MM, QFN-16
NBSG72A	ONSEMI	获取价格	2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Output Level Select

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