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NBSG86ABAR2G PDF预览

NBSG86ABAR2G

更新时间: 2024-11-19 12:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 触发器逻辑集成电路
页数 文件大小 规格书
14页 144K
描述
SPECIALTY LOGIC CIRCUIT, PBGA16, 4 X 4 MM, PLASTIC, FCBGA-16

NBSG86ABAR2G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:4 X 4 MM, PLASTIC, FCBGA-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.84
其他特性:NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V系列:86
JESD-30 代码:S-PBGA-B16长度:4 mm
逻辑集成电路类型:LOGIC CIRCUIT功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.4 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:OTHER端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4 mm
Base Number Matches:1

NBSG86ABAR2G 数据手册

 浏览型号NBSG86ABAR2G的Datasheet PDF文件第2页浏览型号NBSG86ABAR2G的Datasheet PDF文件第3页浏览型号NBSG86ABAR2G的Datasheet PDF文件第4页浏览型号NBSG86ABAR2G的Datasheet PDF文件第5页浏览型号NBSG86ABAR2G的Datasheet PDF文件第6页浏览型号NBSG86ABAR2G的Datasheet PDF文件第7页 
NBSG86A  
2.5V/3.3VꢀSiGe Differential  
Smart Gate with Output  
Level Select  
The NBSG86A is a multi−function differential Logic Gate which  
can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1  
MUX. This device is part of the GigaCommfamily of high  
performance Silicon Germanium products. The device is housed in a  
low profile 4x4 mm, 16−pin, flip−chip BGA or a 3x3 mm 16 pin QFN  
package.  
http://onsemi.com  
MARKING  
DIAGRAM*  
Differential inputs incorporate internal 50 W termination resistors  
and accept NECL (Negative ECL), PECL (Positive ECL),  
LVCMOS/LVTTL, CML, or LVDS. The OLS* input is used to  
program the peak−to−peak output amplitude between 0 and 800 mV  
in five discrete steps.  
SG  
86A  
LYW  
FCBGA−16  
BA SUFFIX  
CASE 489  
The NBSG86A employs input default circuitry so that under open  
16  
input conditions (D , D , VTD , VTD VTSEL) the outputs of the  
x
x
x
x,  
1
device will remain stable.  
SG  
86A  
ALYWG  
G
1
Features  
QFN−16  
MN SUFFIX  
CASE 485G  
Maximum Input Clock Frequency > 8 GHz Typical  
Maximum Input Data Rate > 8 Gb/s Typical  
165 ps Typical Propagation Delay  
40 ps Typical Rise and Fall Times  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
Selectable Swing PECL Output with Operating Range:  
V
CC  
= 2.375 V to 3.465 V with V = 0 V  
EE  
(Note: Microdot may be in either location)  
Selectable Swing NECL Output with NECL Inputs with  
Operating Range: V = 0 V with V = −2.375 V to −3.465 V  
CC  
EE  
*For additional marking information, refer to  
Application Note AND8002/D.  
Selectable Output Level (0 V, 200 mV, 400 mV,  
600 mV, or 800 mV Peak−to−Peak Output)  
50 W Internal Input Termination Resistors  
Pb−Free Packages are Available  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 12 of this data sheet.  
*Output Level Select  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
July, 2006 − Rev. 10  
NBSG86A/D  

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