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NBSG53AMNR2G

更新时间： 2024-11-19 03:46:59
品牌 Logo 应用领域
安森美 - ONSEMI 触发器时钟
页数 文件大小 规格书
18页 153K
描述
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with Reset and OLS

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中文翻译

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NBSG53AMNR2G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC16,.12SQ,20针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.47其他特性：NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V
系列：53输入调节：DIFFERENTIAL
JESD-30 代码：S-XQCC-N16长度：3 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER湿度敏感等级：1
功能数量：1反相输出次数：
端子数量：16实输出次数：1
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC16,.12SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：-2.5/-3.3/2.5/3.3 VProp。Delay @ Nom-Sup：0.275 ns
传播延迟（tpd）：0.285 ns认证状态：Not Qualified
座面最大高度：1 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.465 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Nickel/Gold/Palladium (Ni/Au/Pd)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：3 mmBase Number Matches：1

NBSG53AMNR2G 数据手册

 浏览型号NBSG53AMNR2G的Datasheet PDF文件第2页浏览型号NBSG53AMNR2G的Datasheet PDF文件第3页浏览型号NBSG53AMNR2G的Datasheet PDF文件第4页浏览型号NBSG53AMNR2G的Datasheet PDF文件第5页浏览型号NBSG53AMNR2G的Datasheet PDF文件第6页浏览型号NBSG53AMNR2G的Datasheet PDF文件第7页 
NBSG53A  
2.5V/3.3VꢀSiGe Selectable  
Differential Clock and Data  
D Flip−Flop/Clock Divider  
with Reset and OLS*  
http://onsemi.com  
MARKING  
The NBSG53A is a multi−function differential D flip−flop (DFF) or  
fixed divide by two (DIV/2) clock generator. This is a part of the  
GigaComm™ family of high performance Silicon Germanium  
products. A strappable control pin is provided to select between the  
two functions. The device is housed in a low profile 4x4 mm 16−pin  
Flip−Chip BGA (FCBGA) or a 3x3 mm 16 pin QFN package.  
The NBSG53A is a device with data, clock, OLS*, reset, and select  
inputs. Differential inputs incorporate internal 50 W termination  
resistors and accept NECL (Negative ECL), PECL (Positive ECL),  
LVCMOS/LVTTL, CML, or LVDS. The OLS* input is used to  
program the peak−to−peak output amplitude between 0 and 800 mV  
in five discrete steps. The RESET and SELECT inputs are  
single−ended and can be driven with either LVECL or  
LVCMOS/LVTTL input levels.  
DIAGRAM**  
SG  
53A  
LYW  
FCBGA−16  
BA SUFFIX  
CASE 489  
16  
1
SG  
53A  
ALYWG  
G
1
Data is transferred to the outputs on the positive edge of the clock.  
The differential clock inputs of the NBSG53A allow the device to also  
be used as a negative edge triggered device.  
QFN−16  
MN SUFFIX  
CASE 485G  
Features  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
• Maximum Input Clock Frequency (DFF) > 8 GHz Typical  
(See Figures 4, 6, 8, 10, and 11)  
• Maximum Input Clock Frequency (DIV/2) > 10 GHz Typical  
(See Figures 5, 7, 9, 10, and 11)  
(Note: Microdot may be in either location)  
• 210 ps Typical Propagation Delay (OLS = FLOAT)  
*For additional marking information, refer to  
Application Note AND8002/D.  
• 45 ps Typical Rise and Fall Times (OLS = FLOAT)  
• DIV/2 Mode (Active with Select Low)  
• DFF Mode (Active with Select High)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 16 of this data sheet.  
• Selectable Swing PECL Output with Operating Range: V = 2.375 V  
CC  
to 3.465 V with V = 0 V  
EE  
• Selectable Swing NECL Output with NECL Inputs with  
Operating Range: V = 0 V with V = −2.375 V to −3.465 V  
CC  
EE  
• Selectable Output Level (0 V, 200 mV, 400 mV, 600 mV, or 800 mV  
Peak−to−Peak Output)  
• 50 W Internal Input Termination Resistors on all Differential Inputs  
• Pb−Free Packages are Available  
*Output Level Select  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
July, 2006 − Rev. 8  
NBSG53A/D  
1234567...18

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NBSG53AMNR2G 替代型号

型号 品牌 替代类型 描述 数据表
NBSG53AMNHTBG ONSEMI

完全替代

 2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider
NBSG53AMNG ONSEMI

完全替代

 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with
NBSG53AMNR2 ONSEMI

完全替代

 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset

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