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NBSG86ABAG PDF预览

NBSG86ABAG

更新时间: 2024-11-19 13:11:59
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
20页 112K
描述
SPECIALTY LOGIC CIRCUIT, PBGA16, 4 X 4 MM, PLASTIC, FCBGA-16

NBSG86ABAG 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:BGA包装说明:4 X 4 MM, PLASTIC, FCBGA-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.84
Is Samacsys:N其他特性:NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V
系列:86JESD-30 代码:S-PBGA-B16
长度:4 mm逻辑集成电路类型:LOGIC CIRCUIT
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LBGA
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.4 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:OTHER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

NBSG86ABAG 数据手册

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NBSG86ABAEVB  
Evaluation Board Manual  
for NBSG86A  
http://onsemi.com  
EVALUATION BOARD MANUAL  
DESCRIPTION  
This document describes the NBSG86A evaluation board  
and the appropriate lab test setups. It should be used in  
conjunction with the device data sheet, which includes  
specifications and a full description of device operation.  
The board is used to evaluate the NBSG86A  
GigaComm differential Smart Gate multi-function logic  
gate, which can be configured as an AND/NAND,  
OR/NOR, XOR/XNOR, or 2:1 MUX. The OLS input of the  
NBSG86A is used to program the peak–to–peak output  
amplitude between 0 and 800 mV in five discrete steps.  
The board is implemented in two layers and provides a  
high bandwidth 50 W controlled impedance environment for  
higher performance. The first layer or primary trace layer is  
5 mils thick Rogers RO6002 material, which is engineered  
to have equal electrical length on all signal traces from the  
NBSG86A device to the sense output. The second layer is  
32 mils thick copper ground plane.  
What measurements can you expect to make?  
The following measurements can be performed in the  
single–ended (Note 1) or differential mode of operation:  
Frequency Performance  
Output Amplitude (V /V  
)
OL  
OH  
Output Rise and Fall Time  
Output Skew  
Eye pattern generation  
Jitter  
V  
(Input High Common Mode Range)  
IHCMR  
For standard lab setup and test, a split (dual) power supply  
is required enabling the 50 W impedance from the scope to  
NOTE:  
1. Single- ended measurements can only be made at  
- V = 3.3 V using this board setup.  
be used as termination of the ECL signals, where V is the  
TT  
V
CC  
EE  
system ground (V = 2.0 V, V = V - 2.0 V and V  
CC  
TT  
CC  
EE  
is -0.5 V or -1.3 V, see Setup 1).  
Figure 1. NBSG86A Evaluation Board  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
March, 2003 - Rev. 0  
NBSG86ABAEVB/D  

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