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NB7L1008MMNR4G PDF预览

NB7L1008MMNR4G

更新时间: 2024-09-26 05:51:55
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
10页 149K
描述
Multi−Level Inputs w/ Internal Termination

NB7L1008MMNR4G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:QFN包装说明:HVQCCN, LCC32,.2SQ,20
针数:32Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:13 weeks
风险等级:2.13其他特性:ALSO OPERATES AT 3.3V
系列:7L输入调节:STANDARD
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:32
实输出次数:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5/3.3 V
Prop。Delay @ Nom-Sup:0.25 ns传播延迟(tpd):0.25 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.025 ns
座面最大高度:1 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmBase Number Matches:1

NB7L1008MMNR4G 数据手册

 浏览型号NB7L1008MMNR4G的Datasheet PDF文件第2页浏览型号NB7L1008MMNR4G的Datasheet PDF文件第3页浏览型号NB7L1008MMNR4G的Datasheet PDF文件第4页浏览型号NB7L1008MMNR4G的Datasheet PDF文件第5页浏览型号NB7L1008MMNR4G的Datasheet PDF文件第6页浏览型号NB7L1008MMNR4G的Datasheet PDF文件第7页 
NB7L1008M  
2.5V / 3.3V 1:8 CML Fanout  
MultiLevel Inputs w/ Internal  
Termination  
Description  
http://onsemi.com  
MARKING  
The NB7L1008M is a high performance differential 1:8 Clock/Data  
fanout buffer. The NB7L1008M produces eight identical output copies  
of Clock or Data operating up to 6 GHz or 10.7 Gb/s, respectively. As  
such, the NB7L1008M is ideal for SONET, GigE, Fiber Channel,  
Backplane and other Clock/Data distribution applications. The  
differential inputs incorporate internal 50 W termination resistors that  
are accessed through the VT pin. This feature allows the NB7L1008M  
to accept various logic standards, such as LVPECL, CML, LVDS,  
32DIAGRAM  
1
NB7L  
1008M  
AWLYYWWG  
G
32  
1
QFN32  
MN SUFFIX  
CASE 488AM  
LVCMOS or LVTTL logic levels. The V  
reference output can  
REFAC  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
be used to rebias capacitorcoupled differential or singleended input  
signals. The 1:8 fanout design was optimized for low output skew  
applications. The NB7L1008M is a member of the GigaComm  
family of high performance clock products.  
WL  
YY  
WW  
G
(Note: Microdot may be in either location)  
Features  
Input Data Rate > 12 Gb/s Typical  
Data Dependent Jitter < 20 ps  
Maximum Input Clock Frequency > 8 GHz Typical  
Random Clock Jitter < 0.8 ps RMS  
Low Skew 1:8 CML Outputs, < 25 ps max  
MultiLevel Inputs, accepts LVPECL, CML, LVDS  
160 ps Typical Propagation Delay  
SIMPLIFIED LOGIC DIAGRAM  
Q0  
Q0  
Q1  
Q1  
45 ps Typical Rise and Fall Times  
Differential CML Outputs, 400 mV PeaktoPeak, Typical  
Q2  
Q2  
Operating Range: V = 2.375 V to 3.6 V, GND = 0 V  
CC  
Internal Input Termination Resistors, 50 W  
Q3  
Q3  
IN  
V  
Reference Output  
QFN32 Package, 5 mm x 5 mm  
REFAC  
50W  
VT  
50W  
Q4  
Q4  
40°C to +85°C Ambient Operating Temperature  
These are PbFree Devices  
IN  
V
REFAC  
Q5  
Q5  
Q6  
Q6  
Q7  
Q7  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 9 of  
this data sheet.  
© Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
December, 2008 Rev. 0  
NB7L1008M/D  

NB7L1008MMNR4G 替代型号

型号 品牌 替代类型 描述 数据表
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