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NB3N5573_08 PDF预览

NB3N5573_08

更新时间: 2024-11-23 03:47:03
品牌 Logo 应用领域
安森美 - ONSEMI 时钟发生器
页数 文件大小 规格书
7页 89K
描述
3.3V, Crystal - To- HCSL Clock Generator

NB3N5573_08 数据手册

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NB3N5573  
3.3V, Crystal - To- HCSL  
Clock Generator  
Description  
The NB3N5573 is a high precision, low phase noise clock generator  
that supports PCI Express and Ethernet requirements. The device  
takes a 25 MHz fundamental mode parallel resonant crystal and  
generates differential HCSL output at 25 MHz, 100 MHz, 125 MHz or  
200 MHz clock frequencies.  
http://onsemi.com  
MARKING  
DIAGRAM  
This device is housed in 5.0 mm x 4.4 mm narrow body TSSOP 16  
pin package.  
16  
16  
1
NB3N  
5573  
ALYWG  
G
Features  
1
ꢀUses 25 MHz Fundamental Mode Parallel Resonant Crystal  
ꢀExternal Loop Filter is Not Required  
ꢀHCSL Differential Output  
ꢀPhase Noise:  
TSSOP-16  
DT SUFFIX  
CASE 948F  
A
L
= Assembly Location  
= Wafer Lot  
= Year  
Offset  
100 Hz  
1 kHz  
Noise Power  
-103 dBc/Hz  
-118 dBc/Hz  
-122 dBc/Hz  
Y
W
G
= Work Week  
= Pb-Free Package  
10 kHz  
(Note: Microdot may be in either location)  
100 kHz -130 dBc/Hz  
1 MHz -132 dBc/Hz  
10 MHz -149 dBc/Hz  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
ꢀTypical Period Jitter RMS of 1.5 ps  
ꢀOperating Range 3.3 V 10%  
ꢀIndustrial Temperature Range -40°C to +85°C  
ꢀThese are Pb-Free Devices  
VDD  
X1/CLK  
CLK0  
Clock Buffer  
Crystal Oscillator  
Phase  
Detector  
Charge  
Pump  
HSCL  
Output  
VCO  
25 MHz Clock or  
Crystal  
X2  
CLK0  
HSCL  
Output  
CLK1  
CLK1  
BN  
GND  
S0  
S1  
OE IREF  
Figure 1. NB3N5573 Simplified Logic Diagram  
©ꢀ Semiconductor Components Industries, LLC, 2008  
April, 2008 - Rev. 2  
1
Publication Order Number:  
NB3N5573/D  

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