2 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
MT28F322D20
MT28F322D18
FLASH MEMORY
Low Voltage, Extended Temperature
0.18µm Process Technology
FEATURES
• Flexible dual-bank architecture
– Support for true concurrent operation with zero
latency
BALL ASSIGNMENT
58-Ball FBGA
– Read bank a during program bank b and vice versa
– Read bank a during erase bank b and vice versa
• Basic configuration:
1
2
3
4
5
6
7
8
Seventy-one erasable blocks
– Bank a (8Mb for data storage)
– Bank b (24Mb for program storage)
• VCC, VCCQ, VPP voltages
A11
A8
V
SS
V
CC
V
PP
A18
A6
A4
A
B
C
D
E
A12
A13
A15
A9
A20
CLK
ADV#
A16
RST#
WE#
DQ12
DQ2
A17
A19
WP#
DQ1
DQ9
A5
A7
A3
A2
A10
– 1.70V (MIN), 1.90V (MAX) VCC, VCCQ
(MT28F322D18 only)
WAIT#
DQ6
A14
A1
– 1.80V VCC, VCCQ (MIN); 2.20V VCC (MAX)and 2.25V
VCCQ (MAX) (MT28F322D20 only)
– 0.9V (TYP) VPP (in-system PROGRAM/ERASE)
– 12V 5ꢀ (ꢁV) VPP tolerant (factory programming
compatibility)
V
CCQ
DQ15
DQ14
CE#
DQ0
DQ8
A0
DQ4
DQ13
DQ5
V
SS
DQ10
DQ3
OE#
F
DQ11
DQ7
V
SSQ
VCCQ
VSSQ
G
VCC
• Random access time: 70ns/80ns @ 1.70V VCC
• Burst Mode read access (MT28F322D20)
– MAX clock rate: 54 Mꢁz (tCLK = 18.5ns)
– Burst latency: 70ns @ 1.80V VCC and 54 Mꢁz
– tACLK: 17ns @ 1.80V VCC and 54 Mꢁz
• Page Mode read access1
Top View
(Ball Down)
NOTE: See page 7 for Ball Description Table.
– Eight-word page
See page 43 for mechanical drawing.
– Interpage read access: 70ns/80ns @ 1.80V
– Intrapage read access: 30ns @ 1.80V
• Low power consumption (VCC = 2.20V)
– Asynchronous READ < 15mA (MAX)
– Standby < 50µA
– Automatic power saving feature (APS)
• Enhanced write and erase suspend options
– ERASE-SUSPEND-to-READ within same bank
– PROGRAM-SUSPEND-to-READ within same bank
– ERASE-SUSPEND-to-PROGRAM within same bank
• Dual 64-bit chip protection registers for security
purposes
OPTIONS
MARKING
• Timing
70ns access
80ns access
• Frequency
54 MHz
40 MHz
No burst operation
• Boot Block Configuration
Top
Bottom
• Package
58-ball FBGA (8 x 7 ball grid)
• Operating Temperature Range
Extended (-40ºC to +85ºC)
-70
-80
52
4
None
T
B
• Cross-compatible command support
– Extended command set
– Common flash interface
• PROGRAM/ERASE cycle
FH
ET
– 100,000 WRITE/ERASE cycles per block
NOTE: 1. Data based on MT28F322D20 device.
2. A “5” in the part mark represents two different
frequencies: 54 Mꢁz (MT28F322D20) or 52 Mꢁz
(MT28F322D18)
Part Number Example:
MT28F322D20FH-804 BET
2 Meg x 16 Async/Page/Burst Flash Memory
MT28F322D20FH_4.p65 – Rev. 4, Pub. 7/02
©2002, Micron Technology, Inc.
1
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.