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MPC2001

更新时间: 2024-10-28 22:46:03
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA PC
页数 文件大小 规格书
4页 92K
描述
256KB Asynchronous Secondary Cache Module for PowerPC

MPC2001 数据手册

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Order this document  
by MPC2001/D  
SEMICONDUCTOR TECHNICAL DATA  
MPC2001  
256KB Asynchronous  
Secondary Cache Module for  
PowerPC  
(Formerly MCM64AC32)  
136–LEAD DIMM  
CASE 1104–01  
TOP VIEW  
The MPC2001 is designed to provide asynchronous 256KB L2 cache for the  
PowerPC 60x processors. The module is configured as 32K x 64 bits in a 136  
pin dual readout single inline memory module (DIMM). The module uses eight  
of Motorola’s MCM6206 CMOS RAMs.  
1
Eight write enables are provided for byte write control.  
The cache is designed to interface with the PowerPC 60x bus and requires ex-  
ternal tag.  
PD0 – PD2 are reserved for density and speed identification.  
The cache isplugandpincompatiblewithMotorola’sMPC2002andMPC2003  
BurstRAM synchronous cache modules.  
Dual Readout SIMM (DIMM) for Circuit Density  
Single 5 V ± 5% Power Supply  
34  
35  
All Inputs and Outputs are TTL Compatible  
Three State Outputs  
Byte Write Capability  
Decoupling Capacitors for each Fast Static RAM  
High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes  
Fast SRAM Access Times 12 ns, 15 ns  
Low Cost Asynchronous Solution for MPC105 PCI Bridge/Memory Controller Chip  
68  
BurstRAM is a trademark of Motorola.  
PowerPC and PowerPC 601 are trademarks of International Business Machines Corp.  
5/95  
Motorola, Inc. 1995  

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