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MMPF0100F0AZES

更新时间: 2024-09-18 01:02:55
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
128页 2544K
描述
14 channel configurable power management integrated circuit

MMPF0100F0AZES 技术参数

生命周期:Transferred包装说明:HVQCCN,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
可调阈值:YES模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:S-XQCC-N56长度:8 mm
信道数量:14功能数量:1
端子数量:56最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:0.9 mm
最大供电电压 (Vsup):4.5 V最小供电电压 (Vsup):2.8 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:MOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:8 mm

MMPF0100F0AZES 数据手册

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Document Number: MMPF0100Z  
Rev. 12.0, 8/2016  
NXP Semiconductors  
Data sheet: Advance Information  
14 channel configurable power  
management integrated circuit  
PF0100Z  
Automotive  
The SMARTMOS PF0100Z AEC Q100 grade 2 automotive power management  
integrated circuit (PMIC) provides a highly programmable/ configurable  
architecture, with fully integrated power devices and minimal external  
components. With up to six buck converters, six linear regulators, RTC supply,  
and coin-cell charger, the PF0100Z can provide power for a complete system,  
including applications processors, memory, and system peripherals, in a wide  
range of applications. With on-chip one time programmable (OTP) memory, the  
PF0100Z is available in pre-programmed standard versions, or non-  
programmed to support custom programming. The PF0100Z is especially suited  
to the i.MX 6 family of devices and is supported by full system level reference  
designs, and pre-programmed versions of the device.  
POWER MANAGEMENT  
ES SUFFIX (WF-TYPE)  
98ASA00589D  
56 QFN 8X8  
Features:  
Applications:  
• Four to six buck converters, depending on configuration  
• GPS  
• Auto infotainment  
Single/dual phase/ parallel options  
DDR termination tracking mode option  
• Heads up display (HUD)  
• Rear displays  
• Digital instrumentation cluster (DIC)  
• Boost regulator to 5.0 V output  
• Six general purpose linear regulators  
• Programmable output voltage, sequence, and timing  
• OTP (one time programmable) memory for device configuration  
• Coin cell charger and RTC supply  
• DDR termination reference voltage  
• Power control logic with processor interface and event detection  
• I2C control  
• Individually programmable on, off, and standby modes  
PF0100Z  
i.MX 6X  
VREFDDR  
DDR MEMORY  
INTERFACE  
DDR Memory  
SW4  
1000 mA  
SW3A/B  
2500 mA  
SW1A/B  
2500 mA  
Processor Core  
Voltages  
SW1C  
2000 mA  
External AMP  
Microphones  
Speakers  
SW2  
2000 mA  
SATA - FLASH  
SD-MMC/  
NAND Mem.  
SATA  
HDD  
NAND  
- NOR  
SWBST  
600 mA  
Interfaces  
Audio  
Codec  
Parallel control/GPIOS  
I2C Communication  
Control Signals  
I2C Communication  
Sensors  
VGEN1  
100 mA  
Camera  
Camera  
VGEN2  
250 mA  
GPS  
MIPI  
uPCIe  
WAM  
GPS  
MIPI  
VGEN3  
100 mA  
VGEN4  
350 mA  
HDMI  
LDVS Display  
VGEN5  
100 mA  
USB  
Ethernet  
CAN  
LICELL  
Charger  
VGEN6  
200 mA  
Main Supply  
2.8 – 4.5 V  
COINCELL  
Front USB  
POD  
Rear Seat  
Infotaiment  
Rear USB  
POD  
Cluster/HUD  
Figure 1. Simplified application diagram  
* This document contains certain information on a new product.  
Specifications and information herein are subject to change without notice.  
© 2016 NXP B.V.  

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