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MMPF0100F2AEP PDF预览

MMPF0100F2AEP

更新时间: 2024-09-18 02:46:11
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
136页 1311K
描述
14 channel configurable power management integrated circuit

MMPF0100F2AEP 数据手册

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Document Number: MMPF0100  
Rev. 18, 7/2019  
NXP Semiconductors  
Data sheet: Technical Data  
14 channel configurable power  
management integrated circuit  
PF0100  
The PF0100 SMARTMOS power management integrated circuit (PMIC)  
provides a highly programmable/ configurable architecture, with fully integrated  
power devices and minimal external components. With up to six buck  
converters, six linear regulators, RTC supply, and coin-cell charger, the  
PF0100 can provide power for a complete system, including applications  
processors, memory, and system peripherals, in a wide range of applications.  
With on-chip one time programmable (OTP) memory, the PF0100 is available  
in pre-programmed standard versions, or non-programmed to support custom  
programming. The PF0100 is defined to power an entire embedded MCU  
platform solution such as i.MX 6 based eReader, IPTV, medical monitoring, and  
home/factory automation.  
POWER MANAGEMENT  
EP SUFFIX (E-TYPE)  
ES SUFFIX (WF-TYPE)  
98ASA00589D  
98ASA00405D  
56 QFN 8X8  
56 QFN 8X8  
Features:  
Applications:  
• Four to six buck converters, depending on configuration  
• Tablets  
• IPTV  
Single/Dual phase/ parallel options  
DDR termination tracking mode option  
• eReaders  
• Boost regulator to 5.0 V output  
• Set top boxes  
• Industrial control  
• Medical monitoring  
• Six general purpose linear regulators  
• Programmable output voltage, sequence, and timing  
• OTP (one time programmable) memory for device configuration  
• Coin cell charger and RTC supply  
• Home automation/ alarm/ energy management  
• DDR termination reference voltage  
• Power control logic with processor interface and event detection  
• I2C control  
• Individually programmable ON, OFF, and standby modes  
PF0100  
i.MX 6X  
VREFDDR  
DDR MEMORY  
INTERFACE  
DDR Memory  
SW4  
1000 mA  
SW3A/B  
2500 mA  
SW1A/B  
2500 mA  
Processor Core  
Voltages  
SW1C  
2000 mA  
External AMP  
Microphones  
Speakers  
SW2  
2000 mA  
SATA - FLASH  
SD-MMC/  
NAND Mem.  
SATA  
HDD  
NAND  
- NOR  
SWBST  
600 mA  
Interfaces  
Audio  
Codec  
Parallel control/GPIOS  
I2C Communication  
Control Signals  
I2C Communication  
Sensors  
VGEN1  
100 mA  
Camera  
Camera  
VGEN2  
250 mA  
GPS  
MIPI  
uPCIe  
WAM  
GPS  
MIPI  
VGEN3  
100 mA  
VGEN4  
350 mA  
HDMI  
LDVS Display  
VGEN5  
100 mA  
USB  
Ethernet  
CAN  
LICELL  
Charger  
VGEN6  
200 mA  
Main Supply  
2.8 – 4.5 V  
COINCELL  
Front USB  
POD  
Rear Seat  
Infotaiment  
Rear USB  
POD  
Cluster/HUD  
Figure 1. Simplified application diagram  
© NXP B.V. 2019.  

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