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MM74C925_04 PDF预览

MM74C925_04

更新时间: 2024-09-16 04:39:35
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飞兆/仙童 - FAIRCHILD 计数器
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8页 103K
描述
4-Digit Counters with Multiplexed

MM74C925_04 数据手册

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October 1987  
Revised January 2004  
MM74C925 MM74C926  
4-Digit Counters with Multiplexed  
7-Segment Output Drivers  
General Description  
Features  
Wide supply voltage range: 3V to 6V  
The MM74C925 and MM74C926 CMOS counters consist  
of a 4-digit counter, an internal output latch, NPN output  
sourcing drivers for a 7-segment display, and an internal  
multiplexing circuitry with four multiplexing outputs. The  
multiplexing circuit has its own free-running oscillator, and  
requires no external clock. The counters advance on nega-  
tive edge of clock. A HIGH signal on the Reset input will  
reset the counter to zero, and reset the carry-out LOW. A  
LOW signal on the Latch Enable input will latch the number  
in the counters into the internal output latches. A HIGH sig-  
nal on Display Select input will select the number in the  
counter to be displayed; a LOW level signal on the Display  
Select will select the number in the output latch to be dis-  
played.  
Guaranteed noise margin: 1V  
High noise immunity: 0.45 VCC (typ.)  
High segment sourcing current: 40 mA  
@ VCC 1.6V, VCC = 5V  
Internal multiplexing circuitry  
Design Considerations  
Segment resistors are desirable to minimize power dissipa-  
tion and chip heating. The DS75492 serves as a good digit  
driver when it is desired to drive bright displays. When  
using this driver with a 5V supply at room temperature, the  
display can be driven without segment resistors to full illu-  
mination. The user must use caution in this mode however,  
to prevent overheating of the device by using too high a  
supply voltage or by operating at high ambient tempera-  
tures.  
The MM74C925 is a 4-decade counter and has Latch  
Enable, Clock and Reset inputs.  
The MM74C926 is like the MM74C925 except that it has a  
display select and a carry-out used for cascading counters.  
The carry-out signal goes HIGH at 6000, goes back LOW  
at 0000.  
The input protection circuitry consists of a series resistor,  
and a diode to ground. Thus input signals exceeding VCC  
will not be clamped. This input signal should not be allowed  
to exceed 15V.  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74C925N  
MM74C926N  
N16E  
N18B  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Connection Diagrams  
Pin Assignments for DIP  
Top View  
MM74C925  
Top View  
MM74C926  
© 2004 Fairchild Semiconductor Corporation  
DS005919  
www.fairchildsemi.com  

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