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MM74C926J PDF预览

MM74C926J

更新时间： 2024-11-06 20:05:03
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动逻辑集成电路触发器
页数 文件大小 规格书
8页 199K
描述
IC CMOS SERIES, ASYN NEGATIVE EDGE TRIGGERED 16-BIT UP DISPLAY DRIVER COUNTER, CDIP18, CERAMIC, DIP-18, Counter

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MM74C926J 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP18,.3Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.82
其他特性：4 DIGIT COUNTER计数方向：UP
系列：CMOSJESD-30 代码：R-GDIP-T18
JESD-609代码：e0负载/预设输入：YES
逻辑集成电路类型：DISPLAY DRIVER COUNTER工作模式：ASYNCHRONOUS
位数：16功能数量：1
端子数量：18最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装等效代码：DIP18,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Counters最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：NEGATIVE EDGE宽度：7.62 mm
最小 fmax：2 MHzBase Number Matches：1

MM74C926J 数据手册

 浏览型号MM74C926J的Datasheet PDF文件第2页浏览型号MM74C926J的Datasheet PDF文件第3页浏览型号MM74C926J的Datasheet PDF文件第4页浏览型号MM74C926J的Datasheet PDF文件第5页浏览型号MM74C926J的Datasheet PDF文件第6页浏览型号MM74C926J的Datasheet PDF文件第7页 
March 1988  
MM74C925, MM74C926, MM74C927, MM74C928  
4-Digit Counters with Multiplexed  
7-Segment Output Drivers  
General Description  
These CMOS counters consist of a 4-digit counter, an inter-  
nal output latch, NPN output sourcing drivers for a 7-seg-  
ment display, and an internal multiplexing circuitry with four  
multiplexing outputs. The multiplexing circuit has its own  
free-running oscillator, and requires no external clock. The  
counters advance on negative edge of clock. A high signal  
on the Reset input will reset the counter to zero, and reset  
the carry-out low. A low signal on the Latch Enable input will  
latch the number in the counters into the internal output  
latches. A high signal on Display Select input will select the  
number in the counter to be displayed; a low level signal on  
the Display Select will select the number in the output latch  
to be displayed.  
an overflow indicator which is high at 2000, and it goes back  
low only when the counter is reset. Thus, this is a 3(/2-digit  
counter.  
Features  
Y
Wide supply voltage range  
Guaranteed noise margin  
High noise immunity  
3V to 6V  
1V  
Y
Y
Y
0.45 V  
(typ.)  
40 mA  
CC  
High segment sourcing current  
@
b
e
5V  
V
CC  
1.6V, V  
CC  
Y
Internal multiplexing circuitry  
Design Considerations  
The MM74C925 is a 4-decade counter and has Latch En-  
able, Clock and Reset inputs.  
Segment resistors are desirable to minimize power dissipa-  
tion and chip heating. The DS75492 serves as a good digit  
driver when it is desired to drive bright displays. When using  
this driver with a 5V supply at room temperature, the display  
can be driven without segment resistors to full illumination.  
The user must use caution in this mode however, to prevent  
overheating of the device by using too high a supply voltage  
or by operating at high ambient temperatures.  
The MM74C926 is like the MM74C925 except that it has a  
display select and a carry-out used for cascading counters.  
The carry-out signal goes high at 6000, goes back low at  
0000.  
The MM74C927 is like the MM74C926 except the second  
most significant digit divides by 6 rather than 10. Thus, if the  
clock input frequency is 10 Hz, the display would read  
tenths of seconds and minutes (i.e., 9:59.9).  
The input protection circuitry consists of a series resistor,  
and a diode to ground. Thus input signals exceeding V  
CC  
The MM74C928 is like the MM74C926 except the most sig-  
nificant digit divides by 2 rather than 10 and the carry-out is  
will not be clamped. This input signal should not be allowed  
to exceed 15V.  
Connection Diagrams  
Dual-In-Line Package  
Dual-In-Line Package  
TL/F/5919–2  
TL/F/5919–1  
Top View  
Top View  
Order Number MM74C926,  
MM74C927 or MM74C928  
Order Number MM74C925  
C
1995 National Semiconductor Corporation  
TL/F/5919  
RRD-B30M105/Printed in U. S. A.  
12345678

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