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MM74C932 PDF预览

MM74C932

更新时间: 2024-11-08 22:41:03
品牌 Logo 应用领域
美国国家半导体 - NSC 比较器
页数 文件大小 规格书
6页 115K
描述
Phase Comparator

MM74C932 数据手册

 浏览型号MM74C932的Datasheet PDF文件第2页浏览型号MM74C932的Datasheet PDF文件第3页浏览型号MM74C932的Datasheet PDF文件第4页浏览型号MM74C932的Datasheet PDF文件第5页浏览型号MM74C932的Datasheet PDF文件第6页 
February 1988  
MM54C932/MM74C932 Phase Comparator  
General Description  
The MM74C932/MM54C932 consists of two independent  
output phase comparator circuits. The two phase compara-  
tors have a common signal input and a common comparator  
input. The signal input can be directly coupled for a large  
voltage signal, or capacitively coupled to the self-biasing  
amplifier at the signal input for a small voltage signal.  
Phase comparator II is an edge-controlled digital memory  
network. It provides a digital error signal (phase comp. II  
out) and lock in signal (phase pulses) to indicate a locked  
condition and maintains a 0 phase shift between signal in-  
§
put and comparator input.  
Features  
Y
Phase comparator I, an exclusive-OR gate, provides a digi-  
tal error signal (phase comp. I out) and maintains 90 phase  
shifts at the VCO center frequency. Between signal input  
and comparator input (both at 50% duty cycle), it may lock  
onto the signal input frequencies that are close to harmon-  
ics of the VCO center frequency.  
Wide supply voltage range  
§
Y
Convenient mini-DIP package  
Y
TRI-STATE phase-comparator output (comparator II)  
É
200 mV input voltage (signal in) sensitivity (typical)  
Y
Block and Connection Diagrams  
TL/F/5921–1  
Dual-In-Line Package  
TL/F/5921–2  
Top View  
Order Number MM54C932 or MM74C932  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5921  
RRD-B30M105/Printed in U. S. A.  

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