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MM74C926N PDF预览

MM74C926N

更新时间: 2024-09-15 22:46:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
9页 100K
描述
4-Digit Counters with Multiplexed

MM74C926N 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP18,.3
针数:18Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.73
其他特性:4 DIGIT COUNTER; MULTIPLEXED 7 SEGMENT DISPLAY DRIVERS; TCO OUTPUT计数方向:UP
系列:CMOSJESD-30 代码:R-PDIP-T18
JESD-609代码:e3长度:22.73 mm
负载/预设输入:YES逻辑集成电路类型:DISPLAY DRIVER COUNTER
工作模式:ASYNCHRONOUS湿度敏感等级:1
位数:16功能数量:1
端子数量:18最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP18,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:3.3/5 V
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Counters最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
触发器类型:NEGATIVE EDGE宽度:7.62 mm
最小 fmax:2 MHzBase Number Matches:1

MM74C926N 数据手册

 浏览型号MM74C926N的Datasheet PDF文件第2页浏览型号MM74C926N的Datasheet PDF文件第3页浏览型号MM74C926N的Datasheet PDF文件第4页浏览型号MM74C926N的Datasheet PDF文件第5页浏览型号MM74C926N的Datasheet PDF文件第6页浏览型号MM74C926N的Datasheet PDF文件第7页 
October 1987  
Revised January 1999  
MM74C925 • MM74C926 • MM74C927 • MM74C928  
4-Digit Counters with Multiplexed  
7-Segment Output Drivers  
back LOW only when the counter is reset. Thus, this is a  
3½-digit counter.  
General Description  
The MM74C925, MM74C926, MM74C927 and MM74C928  
CMOS counters consist of a 4-digit counter, an internal out-  
put latch, NPN output sourcing drivers for a 7-segment dis-  
play, and an internal multiplexing circuitry with four  
multiplexing outputs. The multiplexing circuit has its own  
free-running oscillator, and requires no external clock. The  
counters advance on negative edge of clock. A HIGH sig-  
nal on the Reset input will reset the counter to zero, and  
reset the carry-out LOW. A LOW signal on the Latch  
Enable input will latch the number in the counters into the  
internal output latches. A HIGH signal on Display Select  
input will select the number in the counter to be displayed;  
a LOW level signal on the Display Select will select the  
number in the output latch to be displayed.  
Features  
Wide supply voltage range: 3V to 6V  
Guaranteed noise margin: 1V  
High noise immunity: 0.45 VCC (typ.)  
High segment sourcing current: 40 mA  
@ VCC 1.6V, VCC = 5V  
Internal multiplexing circuitry  
Design Considerations  
Segment resistors are desirable to minimize power dissipa-  
tion and chip heating. The DS75492 serves as a good digit  
driver when it is desired to drive bright displays. When  
using this driver with a 5V supply at room temperature, the  
display can be driven without segment resistors to full illu-  
mination. The user must use caution in this mode however,  
to prevent overheating of the device by using too high a  
supply voltage or by operating at high ambient tempera-  
tures.  
The MM74C925 is a 4-decade counter and has Latch  
Enable, Clock and Reset inputs.  
The MM74C926 is like the MM74C925 except that it has a  
display select and a carry-out used for cascading counters.  
The carry-out signal goes HIGH at 6000, goes back LOW  
at 0000.  
The MM74C927 is like the MM74C926 except the second  
most significant digit divides by 6 rather than 10. Thus, if  
the clock input frequency is 10 Hz, the display would read  
tenths of seconds and minutes (i.e., 9:59.9).  
The input protection circuitry consists of a series resistor,  
and a diode to ground. Thus input signals exceeding VCC  
will not be clamped. This input signal should not be allowed  
to exceed 15V.  
The MM74C928 is like the MM74C926 except the most sig-  
nificant digit divides by 2 rather than 10 and the carry-out is  
an overflow indicator which is HIGH at 2000, and it goes  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74C925N  
MM74C926N  
MM74C927N  
MM74C928N  
N16E  
N18A  
N18A  
N18A  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
© 1999 Fairchild Semiconductor Corporation  
DS005919.prf  
www.fairchildsemi.com  

MM74C926N 替代型号

型号 品牌 替代类型 描述 数据表
MM74C928N FAIRCHILD

完全替代

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MM74C927N FAIRCHILD

完全替代

4-Digit Counters with Multiplexed

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