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MIMXRT1021CAG4AR PDF预览

MIMXRT1021CAG4AR

更新时间: 2024-11-18 20:06:23
品牌 Logo 应用领域
恩智浦 - NXP 微控制器外围集成电路
页数 文件大小 规格书
97页 2596K
描述
RISC Microcontroller

MIMXRT1021CAG4AR 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknown风险等级:5.73
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

MIMXRT1021CAG4AR 数据手册

 浏览型号MIMXRT1021CAG4AR的Datasheet PDF文件第2页浏览型号MIMXRT1021CAG4AR的Datasheet PDF文件第3页浏览型号MIMXRT1021CAG4AR的Datasheet PDF文件第4页浏览型号MIMXRT1021CAG4AR的Datasheet PDF文件第5页浏览型号MIMXRT1021CAG4AR的Datasheet PDF文件第6页浏览型号MIMXRT1021CAG4AR的Datasheet PDF文件第7页 
Document Number: IMXRT1020IEC  
Rev. 1, 04/2019  
NXP Semiconductors  
Data Sheet: Technical Data  
MIMXRT1021CAG4A  
MIMXRT1021CAF4A  
i.MX RT1020 Crossover  
Processors for Industrial  
Products  
Package Information  
Plastic Package  
144-Pin LQFP, 20 x 20 mm, 0.5 mm pitch  
100-Pin LQFP, 14 x 14 mm, 0.5 mm pitch  
Ordering Information  
See Table 2 on page 6  
1 i.MX RT1020 introduction  
The i.MX RT1020 is a processor of i.MX RT family  
featuring NXP’s advanced implementation of the Arm  
1. i.MX RT1020 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6  
2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.1. Special signal considerations . . . . . . . . . . . . . . . 15  
3.2. Recommended connections for unused analog  
®
®
Cortex -M7 core, which operates at speeds up to 396  
MHz to provide high CPU performance and real-time  
response.  
The i.MX RT1020 processor has 256 KB on-chip RAM,  
which can be flexibly configured as TCM or  
interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 17  
4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 17  
4.2. System power and clocks . . . . . . . . . . . . . . . . . . 24  
4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 35  
4.5. External memory interface . . . . . . . . . . . . . . . . . 40  
4.6. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50  
4.7. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53  
4.8. Communication interfaces . . . . . . . . . . . . . . . . . . 60  
4.9. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72  
5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 74  
5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 74  
5.2. Boot device interface allocation . . . . . . . . . . . . . . 74  
6. Package information and contact assignments . . . . . . . 80  
6.1. 20 x 20 mm package information . . . . . . . . . . . . 80  
6.2. 14 x 14 mm package information . . . . . . . . . . . . 89  
7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96  
general-purpose on-chip RAM. The i.MX RT1020  
integrates advanced power management module with  
DCDC and LDO that reduces complexity of external  
power supply and simplifies power sequencing. The  
i.MX RT1020 also provides various memory interfaces,  
including SDRAM, RAW NAND FLASH, NOR  
FLASH, SD/eMMC, Quad SPI, and a wide range of  
connectivity interfaces including UART, SPI, I2C, USB,  
and CAN; for connecting peripherals including WLAN,  
Bluetooth™, and GPS. The i.MX RT1020 also has rich  
audio features, including SPDIF and I2S audio interface.  
Various analog IP integration, including ADC, analog  
comparator, temperature sensor, etc.  
NXP reserves the right to change the production detail specifications as may be required  
to permit improvements in the design of its products.  

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