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MCIMX516AJM6C PDF预览

MCIMX516AJM6C

更新时间: 2024-02-25 03:23:58
品牌 Logo 应用领域
飞思卡尔 - FREESCALE /
页数 文件大小 规格书
172页 2225K
描述
i.MX51A Automotive and Infotainment Applications Processors

MCIMX516AJM6C 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:BGA
包装说明:19 X 19 MM, 0.8 MM PITCH, ROHS COMPLIANT, BGA-529针数:529
Reach Compliance Code:unknownECCN代码:5A002
HTS代码:8542.31.00.01风险等级:5.74
JESD-30 代码:S-PBGA-B529长度:19 mm
湿度敏感等级:3端子数量:529
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA529,23X23,32封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.2 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Graphics Processors
最大供电电压:1.1 V最小供电电压:0.95 V
标称供电电压:1 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Silver/Copper - with Nickel barrier端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40宽度:19 mm
uPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUITBase Number Matches:1

MCIMX516AJM6C 数据手册

 浏览型号MCIMX516AJM6C的Datasheet PDF文件第2页浏览型号MCIMX516AJM6C的Datasheet PDF文件第3页浏览型号MCIMX516AJM6C的Datasheet PDF文件第4页浏览型号MCIMX516AJM6C的Datasheet PDF文件第6页浏览型号MCIMX516AJM6C的Datasheet PDF文件第7页浏览型号MCIMX516AJM6C的Datasheet PDF文件第8页 
Features  
Table 2. i.MX51A Digital and Analog Modules (continued)  
Block Name Subsystem Brief Description  
Block  
Mnemonic  
EMI  
External  
Memory  
Interface  
Connectivity  
Peripherals  
The EMI is an external and internal memory interface. It performs arbitration  
between multi-AXI masters to multi-memory controllers, divided into four major  
channels: fast memories (Mobile DDR, DDR2) channel, slow memories  
(NOR-FLASH/PSRAM/NAND-FLASH etc.) channel, internal memory (RAM,  
ROM) channel and graphical memory (GMEM) Channel.  
In order to increase the bandwidth performance, the EMI separates the buffering  
and the arbitration between different channels so parallel accesses can occur.  
By separating the channels, slow accesses do not interfere with fast accesses.  
EMI features:  
• 64-bit and 32-bit AXI ports  
• Enhanced arbitration scheme for fast channel, including dynamic master  
priority, and taking into account which pages are open or closed and what  
type (Read or Write) was the last access  
• Flexible bank interleaving  
• Supports 16/32-bit Mobile DDR up to 200 MHz SDCLK (mDDR400)  
• Supports 16/32-bit (Non-Mobile) DDR2 up to 200 MHz SDCLK (DDR2-400)  
• Supports up to 2 Gbit Mobile DDR memories  
• Supports 16-bit (in muxed mode only) PSRAM memories (sync and async  
operating modes), at slow frequency, for debugging purposes  
• Supports 32-bit NOR-Flash memories (only in muxed mode), at slow  
frequencies for debugging purposes  
• Supports 4/8-ECC, page sizes of 512 Bytes, 2 KBytes and 4 KBytes  
• NAND-Flash (including MLC)  
• Multiple chip selects  
• Enhanced Mobile DDR memory controller, supporting access latency hiding  
• Supports watermarking for security (Internal and external memories)  
• Supports Samsung OneNAND(only in muxed I/O mode)  
EPIT-1  
EPIT-2  
Enhanced  
Periodic  
Interrupt  
Timer  
Timer  
Peripherals  
Each EPIT is a 32-bit “set and forget” timer that starts counting after the EPIT is  
enabled by software. It is capable of providing precise interrupts at regular  
intervals with minimal processor intervention. It has a 12-bit prescaler for division  
of input clock frequency to get the required time setting for the interrupts to occur,  
and counter values can be programmed on the fly.  
eSDHC-1  
eSDHC-2  
eSDHC-3  
Enhanced  
Multi-Media  
Card/  
SecureDigital  
Host  
Connectivity  
Peripherals  
The features of the eSDHC module, when serving as host, include the following:  
• Conforms to SD Host Controller Standard Specification version 2.0  
• Compatible with the MMC System Specification version 4.2  
• Compatible with the SD Memory Card Specification version 2.0  
• Compatible with the SDIO Card Specification version 1.2  
• Designed to work with SD Memory, miniSD Memory, SDIO, miniSDIO, SD  
Combo, MMC and MMC RS cards  
Controller  
• Configurable to work in one of the following modes:  
—SD/SDIO 1-bit, 4-bit  
—MMC 1-bit, 4-bit, 8-bit  
• Full-/high-speed mode  
• Host clock frequency variable between 32 kHz to 52 MHz  
• Up to 200 Mbps data transfer for SD/SDIO cards using four parallel data lines  
• Up to 416 Mbps data transfer for MMC cards using eight parallel data lines  
i.MX51A Automotive and Infotainment Applications Processors, Rev. 2  
Freescale Semiconductor  
5
Preliminary—Subject to Change Without Notice  

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