5秒后页面跳转
MC74VHCT259AM PDF预览

MC74VHCT259AM

更新时间: 2024-11-04 05:22:07
品牌 Logo 应用领域
安森美 - ONSEMI 解码器驱动器转换器电平转换器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 116K
描述
8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs

MC74VHCT259AM 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:EIAJ, SOIC-16
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.49Is Samacsys:N
系列:AHCT/VHCT输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.008 A
湿度敏感等级:3位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):18 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

MC74VHCT259AM 数据手册

 浏览型号MC74VHCT259AM的Datasheet PDF文件第2页浏览型号MC74VHCT259AM的Datasheet PDF文件第3页浏览型号MC74VHCT259AM的Datasheet PDF文件第4页浏览型号MC74VHCT259AM的Datasheet PDF文件第5页浏览型号MC74VHCT259AM的Datasheet PDF文件第6页浏览型号MC74VHCT259AM的Datasheet PDF文件第7页 
MC74VHCT259A  
8−Bit Addressable  
Latch/1−of−8 Decoder  
CMOS Logic Level Shifter  
with LSTTL−Compatible Inputs  
http://onsemi.com  
MARKING  
The MC74VHCT259 is an 8−bit Addressable Latch fabricated with  
silicon gate CMOS technology. It achieves high speed operation  
similar to equivalent Bipolar Schottky TTL while maintaining CMOS  
low power dissipation.  
DIAGRAMS  
16  
1
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The VHC259 is designed for general purpose storage applications in  
digital systems. The device has four modes of operation as shown in  
the mode selection table. In the addressable latch mode, the signal on  
Data In is written into the addressed latch. The addressed latch follows  
the data input with all non−addressed latches remaining in their  
previous states. In the memory mode, all latches remain in their  
previous state and are unaffected by the Data or Address inputs. In the  
one−of−eightdecoding or demultiplexing mode, the addressed output  
follows the state of Data In with all other outputs in the LOW state. In  
the Reset mode, all outputs are LOW and unaffected by the address  
and data inputs. When operating the VHCT259 as an addressable  
latch, changing more than one bit of the address could impose a  
transient wrong address. Therefore, this should only be done while in  
the memory mode.  
SOIC−16  
D SUFFIX  
CASE 751B  
VHCT259AG  
AWLYWW  
1
16  
VHCT  
259A  
ALYWG  
G
TSSOP−16  
DT SUFFIX  
CASE 948F  
1
1
16  
SOEIAJ−16  
M SUFFIX  
CASE 966  
74VHCT259  
ALYWG  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V because it  
has full 5.0 V CMOS level output swings.  
1
1
The VHCT259A input structures provide protection when voltages  
between 0 V and 5.5 V are applied, regardless of the supply voltage.  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
The output structures also provide protection when V = 0 V. These  
CC  
WW, W = Work Week  
input and output structures help prevent device destruction caused by  
supply voltage−input/output voltage mismatch, battery backup, hot  
insertion, etc.  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
Features  
ORDERING INFORMATION  
High Speed: t = 7.6 ns (Typ) at V = 5.0 V  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
PD  
CC  
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL  
IH  
Power Down Protection Provided on Inputs and Outputs  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ESD Performance: HBM > 2000 V  
Pb−Free Packages are Available*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
January, 2006 − Rev. 4  
MC74VHCT259A/D  

与MC74VHCT259AM相关器件

型号 品牌 获取价格 描述 数据表
MC74VHCT259AMEL ONSEMI

获取价格

8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LST
MC74VHCT259AMELG ONSEMI

获取价格

8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LST
MC74VHCT259AMG ONSEMI

获取价格

8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LST
MC74VHCT32A ONSEMI

获取价格

QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER
MC74VHCT32A_11 ONSEMI

获取价格

Quad 2-Input OR Gate / CMOS Logic Level Shifter
MC74VHCT32A_19 ONSEMI

获取价格

Quad 2-Input OR Gate CMOS Logic Level Shifter
MC74VHCT32AD ONSEMI

获取价格

QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER
MC74VHCT32ADR2 ONSEMI

获取价格

AHCT/VHCT SERIES, QUAD 2-INPUT OR GATE, PDSO14, SOIC-14
MC74VHCT32ADR2G ONSEMI

获取价格

Quad 2-Input OR Gate / CMOS Logic Level Shifter
MC74VHCT32ADT ONSEMI

获取价格

QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER