MC74VHCT32A
Quad 2-Input OR Gate /
CMOS Logic Level Shifter
with LSTTL − Compatible Inputs
The MC74VHCT32A is an advanced high speed CMOS 2−input
OR gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5.0 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logic−level translator from
3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic
to 3.0 V CMOS Logic while operating at the high−voltage power
supply.
www.onsemi.com
MARKING
DIAGRAMS†
14
SOIC−14
D SUFFIX
CASE 751A
VHCT32AG
AWLYWW
1
1
14
VHCT
32A
TSSOP−14
DT SUFFIX
CASE 948G
The MC74VHCT32A input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHCT32A to be used to interface 5.0 V circuits to
3.0 V circuits. The output structures also provide protection when
ALYW
ꢀ
ꢀ
1
1
A
WL, L
Y
= Assembly Location
= Wafer Lot
= Year
V
CC
= 0 V. These input and output structures help prevent device
destruction caused by supply voltage − input/output voltage mismatch,
battery backup, hot insertion, etc.
WW, W = Work Week
G or = Pb−Free Package
ꢀ
Features
(Note: Microdot may be in either location)
• High Speed: t = 3.8 ns (Typ) at V = 5.0 V
PD
CC
†For additional marking information, refer to
Application Note AND8002/D.
• Low Power Dissipation: I = 2 mA (Max) at T = 25°C
CC
A
• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V
IL
IH
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V
= 0.8 V (Max)
OLP
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
January, 2019 − Rev. 5
MC74VHCT32A/D