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MC74VHCT373ADWR2G

更新时间： 2024-11-04 19:59:43
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 96K
描述
AHCT/VHCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOIC-20

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MC74VHCT373ADWR2G 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOIC-20
针数：20Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.29
系列：AHCT/VHCTJESD-30 代码：R-PDSO-G20
长度：12.8 mm逻辑集成电路类型：BUS DRIVER
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED传播延迟（tpd）：14.5 ns
认证状态：Not Qualified座面最大高度：2.65 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

MC74VHCT373ADWR2G 数据手册

 浏览型号MC74VHCT373ADWR2G的Datasheet PDF文件第2页浏览型号MC74VHCT373ADWR2G的Datasheet PDF文件第3页浏览型号MC74VHCT373ADWR2G的Datasheet PDF文件第4页浏览型号MC74VHCT373ADWR2G的Datasheet PDF文件第5页浏览型号MC74VHCT373ADWR2G的Datasheet PDF文件第6页浏览型号MC74VHCT373ADWR2G的Datasheet PDF文件第7页 
MC74VHCT373A  
Octal D−Type Latch  
with 3−State Output  
The MC74VHCT373A is an advanced high speed CMOS octal latch  
with 3−state output fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
http://onsemi.com  
This 8−bit D−type latch is controlled by a latch enable input and an  
output enable input. When the output enable input is high, the eight  
outputs are in a high impedance state.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V, because it  
has full 5.0 V CMOS level output swings.  
The VHCT373A input and output (when disabled) structures  
provide protection when voltages between 0 V and 5.5 V are applied,  
regardless of the supply voltage. These input and output structures  
help prevent device destruction caused by supply  
voltage−input/output voltage mismatch, battery backup, hot insertion,  
etc.  
MARKING  
DIAGRAMS  
20  
1
VHCT373A  
AWLYYWWG  
SOIC−20WB  
SUFFIX DW  
CASE 751D  
1
20  
Features  
VHCT  
373A  
ALYWG  
G
• High Speed: t = 7.7 ns (Typ) at V = 5.0 V  
PD  
CC  
1
TSSOP−20  
SUFFIX DT  
CASE 948E  
• Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
CC  
A
• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
1
IL  
IH  
• Power Down Protection Provided on Inputs and Outputs  
• Balanced Propagation Delays  
A
= Assembly Location  
= Wafer Lot  
• Designed for 4.5 V to 5.5 V Operating Range  
• Low Noise: V  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300 mA  
• ESD Performance:  
WL, L  
YY, Y  
= 1.6 V (Max)  
OLP  
= Year  
WW, W = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
Human Body Model > 2000 V;  
Machine Model > 200 V  
FUNCTION TABLE  
• Chip Complexity: 196 FETs or 49 Equivalent Gates  
• Pb−Free Packages are Available*  
INPUTS  
LE  
OUTPUT  
Q
OE  
D
L
L
L
H
H
L
H
L
X
X
H
L
No Change  
Z
H
X
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
January, 2006 − Rev. 4  
MC74VHCT373A/D  
1234567

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 		AHCT/VHCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ, SOIC-20
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