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MC74VHCT259ADR2G PDF预览

MC74VHCT259ADR2G

更新时间： 2024-01-27 02:49:49
品牌 Logo 应用领域
安森美 - ONSEMI 解码器驱动器转换器电平转换器锁存器逻辑集成电路光电二极管PC
页数 文件大小 规格书
9页 116K
描述
8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs

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MC74VHCT259ADR2G 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.34Samacsys Confidence：3
Samacsys Status：ReleasedSamacsys PartID：225526
Samacsys Pin Count：16Samacsys Part Category：Integrated Circuit
Samacsys Package Category：Small Outline PackagesSamacsys Footprint Name：SOIC-16 CASE751B-05
Samacsys Released Date：2015-08-11 09:44:16Is Samacsys：N
系列：AHCT/VHCT输入调节：STANDARD
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：9.9 mm负载电容（CL）：50 pF
逻辑集成电路类型：OTHER DECODER/DRIVER最大I（ol）：0.008 A
湿度敏感等级：1位数：8
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：5 VProp。Delay @ Nom-Sup：11.5 ns
传播延迟（tpd）：18 ns认证状态：Not Qualified
座面最大高度：1.75 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：3.9 mm
Base Number Matches：1

MC74VHCT259ADR2G 数据手册

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MC74VHCT259A  
8−Bit Addressable  
Latch/1−of−8 Decoder  
CMOS Logic Level Shifter  
with LSTTL−Compatible Inputs  
http://onsemi.com  
MARKING  
The MC74VHCT259 is an 8−bit Addressable Latch fabricated with  
silicon gate CMOS technology. It achieves high speed operation  
similar to equivalent Bipolar Schottky TTL while maintaining CMOS  
low power dissipation.  
DIAGRAMS  
16  
1
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The VHC259 is designed for general purpose storage applications in  
digital systems. The device has four modes of operation as shown in  
the mode selection table. In the addressable latch mode, the signal on  
Data In is written into the addressed latch. The addressed latch follows  
the data input with all non−addressed latches remaining in their  
previous states. In the memory mode, all latches remain in their  
previous state and are unaffected by the Data or Address inputs. In the  
one−of−eightdecoding or demultiplexing mode, the addressed output  
follows the state of Data In with all other outputs in the LOW state. In  
the Reset mode, all outputs are LOW and unaffected by the address  
and data inputs. When operating the VHCT259 as an addressable  
latch, changing more than one bit of the address could impose a  
transient wrong address. Therefore, this should only be done while in  
the memory mode.  
SOIC−16  
D SUFFIX  
CASE 751B  
VHCT259AG  
AWLYWW  
1
16  
VHCT  
259A  
ALYWG  
G
TSSOP−16  
DT SUFFIX  
CASE 948F  
1
1
16  
SOEIAJ−16  
M SUFFIX  
CASE 966  
74VHCT259  
ALYWG  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V because it  
has full 5.0 V CMOS level output swings.  
1
1
The VHCT259A input structures provide protection when voltages  
between 0 V and 5.5 V are applied, regardless of the supply voltage.  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
The output structures also provide protection when V = 0 V. These  
CC  
WW, W = Work Week  
input and output structures help prevent device destruction caused by  
supply voltage−input/output voltage mismatch, battery backup, hot  
insertion, etc.  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
Features  
ORDERING INFORMATION  
• High Speed: t = 7.6 ns (Typ) at V = 5.0 V  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
PD  
CC  
• Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL  
IH  
• Power Down Protection Provided on Inputs and Outputs  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300 mA  
• ESD Performance: HBM > 2000 V  
• Pb−Free Packages are Available*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
January, 2006 − Rev. 4  
MC74VHCT259A/D  
1234567...9

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MC74VHCT259ADR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC14511BDR2G ONSEMI

类似代替

 BCD-to-Seven Segment Latch/Decoder/Drive
MC14511BDG ONSEMI

类似代替

 BCD−To−Seven Segment Latch/Decoder/Driver

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