The MC74VHCT257A is an advanced high speed CMOS quad
2–channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2–input digital multiplexers with common select
(S) and enable (OE) inputs. When (OE) is held High, selection of data
is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can be
used as a level converter for interfacing 3.3 V to 5.0 V because it has full
5 V CMOS level output swings.
http://onsemi.com
MARKING DIAGRAMS
14
1
8
7
VHCT257A
AWLYWW
SOIC–14
D SUFFIX
CASE 751A
14
8
The VHCT257A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage. The
VHCT
257A
output structures also provide protection when V = 0 V. These input and
CC
output structures help prevent device destruction caused by supply
voltage—input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The inputs
tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V
systems.
TSSOP–14
DT SUFFIX
CASE 948G
AWLYWW
7
1
A
= Assembly Location
= Year
• High Speed: t
= 4.1ns (Typ) at V
= 5V
WL = Wafer Lot
Y
WW = Work Week
PD
• Low Power Dissipation: I
CC
= 4µA (Max) at T = 25°C
CC
A
• TTL–Compatible Inputs: V = 0.8 V; V = 2.0 V
IL IH
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
14
8
VHCT257A
ALYW
SOIC EIAJ–14
M SUFFIX
CASE 965
• Low Noise: V
= 0.8V (Max)
OLP
7
1
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
A
L
= Assembly Location
= Wafer Lot
• ESD Performance: HBM > 2000V; Machine Model > 200V
Y
= Year
PIN ASSIGNMENT
W = Work Week
V
S
1
2
16
CC
A0
15 OE
ORDERING INFORMATION
B0
Y0
A3
B3
Y3
A2
B2
Y2
3
4
14
13
Device
Package
Shipping
MC74VHCT257AD
SOIC–14
55 Units/Rail
A1
5
6
12
11
MC74VHCT257ADT TSSOP–14
SOIC
96 Units/Rail
50 Units/Rail
B1
7
8
10
Y1
MC74VHCT257AM
EIAJ–14
GND
9
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
May, 2000 – Rev. 0
MC74VHCT257A/D