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MC74VHC257_14 PDF预览

MC74VHC257_14

更新时间: 2024-11-01 01:13:55
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
7页 97K
描述
Quad 2-Channel Multiplexer with 3-State Outputs

MC74VHC257_14 数据手册

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MC74VHC257  
Quad 2-Channel Multiplexer  
with 3-State Outputs  
The MC74VHC257 is an advanced high speed CMOS quad  
2−channel multiplexer fabricated with silicon gate CMOS technology.  
It achieves high speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining CMOS low power dissipation.  
It consists of four 2−input digital multiplexers with common select  
(S) and enable (OE) inputs. When (OE) is held High, selection of data  
is inhibited and all the outputs go Low.  
The select decoding determines whether the A or B inputs get routed  
to the corresponding Y outputs.  
The inputs tolerate voltages up to 7 V, allowing the interface of 5 V  
systems to 3 V systems.  
http://onsemi.com  
MARKING DIAGRAMS  
16  
9
VHC257G  
AWLYWW  
SO−16  
D SUFFIX  
CASE 751B  
1
8
High Speed: t = 4.1 ns (Typ) at V = 5.0 V  
PD  
CC  
Low Power Dissipation: I = 4.0 mA (Max) at T = 25°C  
CC  
A
16  
9
High Noise Immunity: V  
= V  
= 28% V  
NIH  
NIL CC  
VHC  
257  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
TSSOP−16  
DT SUFFIX  
CASE 948F  
ALYWG  
G
Designed for 2.0 V to 5.5 V Operating Range  
1
8
Low Noise: V  
= 0.8 V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
A
= Assembly Location  
L, WL = Wafer Lot  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
Chip Complexity: FETs = 100; Equivalent Gates = 25  
These Devices are Pb−Free and are RoHS Compliant  
Y, YY = Year  
W, WW = Work Week  
G or G = Pb−Free Package  
ORDERING INFORMATION  
V
S
1
2
16  
15  
CC  
Device  
Package  
SO−16  
SO−16  
Shipping  
48 Units/Rail  
2500 Units/Reel  
A0  
OE  
A3  
B3  
MC74VHC257DG  
MC74VHC257DR2G  
MC74VHC257DTG  
B0  
Y0  
3
4
14  
13  
TSSOP−16 96 Units/Rail  
MC74VHC257DTR2G TSSOP−16 2500 Units/Reel  
A1  
B1  
Y3  
A2  
5
6
12  
11  
B2  
Y2  
7
8
10  
9
Y1  
GND  
Figure 1. Pin Assignment  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
September, 2014 − Rev. 6  
MC74VHC257/D  

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