MC74VHC259
8-Bit Addressable
Latch/1-of-8 Decoder
CMOS Logic Level Shifter
with LSTTL−Compatible Inputs
The MC74VHC259 is an 8−bit Addressable Latch fabricated with
silicon gate CMOS technology. It achieves high speed operation similar to
equivalent Bipolar Schottky TTL devices while maintaining CMOS low
power dissipation.
The VHC259 is designed for general purpose storage applications in
digital systems. The device has four modes of operation as shown in the
mode selection table.. In the addressable latch mode, the data on Data In
is written into the addressed latch. The addressed latch follows the data
input with all non−addressed latches remaining in their previous states. In
the memory mode, all latches remain in their previous state and are
unaffected by the Data or Address inputs. In the one−of−eight decoding
or demultiplexing mode, the addressed output follows the state of Data In
with all other outputs in the LOW state. In the Reset mode, all outputs are
LOW and unaffected by the address and data inputs. When operating the
VHC259 as an addressable latch, changing more than one bit of the
address could impose a transient wrong address. Therefore, this should
only be done while in the memory mode.
http://onsemi.com
MARKING DIAGRAMS
16
1
9
8
VHC259G
AWLYYWW
SOIC−16
D SUFFIX
CASE 751B
16
9
VHC
259
TSSOP−16
DT SUFFIX
CASE 948F
ALYWG
G
1
8
The MC74VHC259 input structure provides protection when voltages
up to 7 V are applied, regardless of the supply voltage. This allows the
MC74VHC259 to be used to interface 5 V circuits to 3 V circuits.
A
= Assembly Location
L, WL = Wafer Lot
Y, YY = Year
• High Speed: t = 7.6 ns (Typ) at V = 5 V
W, WW = Work Week
G or G = Pb−Free Package
PD
CC
• Low Power Dissipation: I = 2 μA (Max) at T = 25°C
CC
A
• High Noise Immunity: V
= V
= 28% V
NIH
NIL CC
• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load
OH
CC OL
CC
ORDERING INFORMATION
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
Device
Package
Shipping
48 Units/Rail
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
MC74VHC259DG
MC74VHC259DR2G
MC74VHC259DTG
SOIC−16
SOIC−16 2500 Units/Reel
TSSOP−16 96 Units/Rail
• ESD Performance: HBM > 2000 V
• These Devices are Pb−Free and are RoHS Compliant
MC74VHC259DTR2G TSSOP−16 2500 Units/Reel
A0
A1
1
2
16
15
V
CC
RESET
3
4
14
13
A2
Q0
Q1
ENABLE
DATA IN
Q7
5
6
7
8
12
11
10
9
Q2
Q3
Q6
Q5
Q4
GND
Figure 1. Pin Assignment
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
September, 2014 − Rev. 5
MC74VHC259/D