MC74VHC259MEL

更新时间： 2024-11-01 05:22:11

品牌	Logo	应用领域
安森美 - ONSEMI		解码器转换器电平转换器
页数	文件大小	规格书
8页	107K
描述
8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter

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MC74VHC259MEL 数据手册

MC74VHC259

8-Bit Addressable

Latch/1-of-8 Decoder

CMOS Logic Level Shifter

with LSTTL–Compatible Inputs

The MC74VHC259 is an 8–bit Addressable Latch fabricated with

silicon gate CMOS technology. It achieves high speed operation similar to

equivalent Bipolar Schottky TTL devices while maintaining CMOS low

power dissipation.

The VHC259 is designed for general purpose storage applications in

digital systems. The device has four modes of operation as shown in the

mode selection table.. In the addressable latch mode, the data on Data In

is written into the addressed latch. The addressed latch follows the data

input with all non–addressed latches remaining in their previous states. In

the memory mode, all latches remain in their previous state and are

unaffected by the Data or Address inputs. In the one–of–eight decoding

or demultiplexing mode, the addressed output follows the state of Data In

with all other outputs in the LOW state. In the Reset mode, all outputs are

LOW and unaffected by the address and data inputs. When operating the

VHC259 as an addressable latch, changing more than one bit of the

address could impose a transient wrong address. Therefore, this should

only be done while in the memory mode.

http://onsemi.com

MARKING DIAGRAMS

VHC259

AWLYYWW

SOIC–16

D SUFFIX

CASE 751B

VHC259

TSSOP–16

DT SUFFIX

CASE 948F

AWLYWW

The MC74VHC259 input structure provides protection when voltages

up to 7 V are applied, regardless of the supply voltage. This allows the

MC74VHC259 to be used to interface 5 V circuits to 3 V circuits.

VHC259

ALYW

• High Speed: t = 7.6 ns (Typ) at V = 5 V

SOIC EIAJ–16

M SUFFIX

CASE 966

• Low Power Dissipation: I = 2 µA (Max) at T = 25°C

• High Noise Immunity: V

= V = 28% V

NIL CC

NIH

• CMOS–Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load

CC OL

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

= Assembly Location

L, WL = Wafer Lot

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300 mA

Y, YY = Year

W, WW = Work Week

• ESD Performance: HBM > 2000 V

ORDERING INFORMATION

Device

Package

SOIC–16

TSSOP–16

Shipping

48 Units/Rail

RESET

MC74VHC259D

MC74VHC259DR2

MC74VHC259DT

ENABLE

DATA IN

2500 Units/Reel

96 Units/Rail

MC74VHC259DTR2 TSSOP–16 2500 Units/Reel

SOIC

MC74VHC259M

50 Units/Rail

EIAJ–16

GND

SOIC

EIAJ–16

MC74VHC259MEL

2000 Units/Reel

Figure 1. Pin Assignment

Semiconductor Components Industries, LLC, 2001

Publication Order Number:

April, 2001 – Rev. 2

MC74VHC259/D

12 3 4 5 6 7 8

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与MC74VHC259MEL相关器件

型号	品牌	获取价格	描述	数据表
MC74VHC259MELG	ONSEMI	获取价格	AHC/VHC SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, EIAJ, SOIC-16
MC74VHC259MG	ONSEMI	获取价格	AHC/VHC SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, EIAJ, SOIC-16
MC74VHC2G17MU3TCG	ONSEMI	获取价格	Dual Buffer, Schmitt Trigger Input
MC74VHC32	ONSEMI	获取价格	Quad 2-Input OR Gate
MC74VHC32_14	ONSEMI	获取价格	Quad 2-Input OR Gate
MC74VHC32D	ONSEMI	获取价格	Quad 2-Input OR Gate
MC74VHC32DR2	MOTOROLA	获取价格	AHC/VHC SERIES, QUAD 2-INPUT OR GATE, PDSO14, PLASTIC, SOIC-14
MC74VHC32DR2	ONSEMI	获取价格	AHC/VHC SERIES, QUAD 2-INPUT OR GATE, PDSO14, SOIC-14
MC74VHC32DR2G	ONSEMI	获取价格	Quad 2-Input OR Gate
MC74VHC32DT	ONSEMI	获取价格	Quad 2-Input OR Gate

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