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MC74LCX541DTR2G PDF预览

MC74LCX541DTR2G

更新时间: 2024-11-22 02:57:23
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 118K
描述
Low-Voltage CMOS Octal Buffer Flow Through Pinout

MC74LCX541DTR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.66控制类型:ENABLE LOW
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6.5 ns
传播延迟(tpd):7.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

MC74LCX541DTR2G 数据手册

 浏览型号MC74LCX541DTR2G的Datasheet PDF文件第2页浏览型号MC74LCX541DTR2G的Datasheet PDF文件第3页浏览型号MC74LCX541DTR2G的Datasheet PDF文件第4页浏览型号MC74LCX541DTR2G的Datasheet PDF文件第5页浏览型号MC74LCX541DTR2G的Datasheet PDF文件第6页浏览型号MC74LCX541DTR2G的Datasheet PDF文件第7页 
MC74LCX541  
Low-Voltage CMOS Octal  
Buffer Flow Through Pinout  
With 5 V−Tolerant Inputs and Outputs  
(3−State, Non−Inverting)  
http://onsemi.com  
The MC74LCX541 is a high performance, non−inverting octal  
buffer operating from a 2.3 to 3.6 V supply. This device is similar in  
function to the MC74LCX244, while providing flow through  
architecture. High impedance TTL compatible inputs significantly  
reduce current loading to input drivers while TTL compatible outputs  
SOIC−20 WB  
DW SUFFIX  
CASE 751D  
TSSOP−20  
DT SUFFIX  
CASE 948E  
offer improved switching noise performance. A V specification of  
I
5.5 V allows MC74LCX541 inputs to be safely driven from 5 V  
devices. The MC74LCX541 is suitable for memory address driving  
and all TTL level bus oriented transceiver applications.  
Current drive capability is 24 mA at the outputs. The Output Enable  
(OE1. OE2) inputs, when HIGH, disables the output by placing them  
in a HIGH Z condition.  
MARKING DIAGRAMS  
20  
1
LCX541  
AWLYYWWG  
Features  
Designed for 2.3 to 3.6 V V Operation  
CC  
5 V Tolerant − Interface Capability With 5 V TTL Logic  
Supports Live Insertion and Withdrawal  
SOIC−20 WB  
I  
Specification Guarantees High Impedance When V = 0 V  
CC  
OFF  
20  
LVTTL Compatible  
LCX  
541  
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
ALYW G  
G
Near Zero Static Supply Current in All Three Logic States (10 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500 mA  
1
TSSOP−20  
ESD Performance:  
A
L, WL  
Y, YY  
=
=
=
Assembly Location  
Wafer Lot  
Year  
Human Body Model > 2000 V  
Machine Model > 200 V  
W, WW = Work Week  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
Compliant  
dimensions section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
August, 2014 − Rev. 9  
MC74LCX541/D  

MC74LCX541DTR2G 替代型号

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MC74LCX541DTG ONSEMI

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MC74LCX541DT ONSEMI

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