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MC74HCT138ADTR2 PDF预览

MC74HCT138ADTR2

更新时间: 2024-11-18 05:09:55
品牌 Logo 应用领域
安森美 - ONSEMI 解码器驱动器解复用器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
8页 103K
描述
1−of−8 Decoder/ Demultiplexer with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS

MC74HCT138ADTR2 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:LEAD FREE, TSSOP-16
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.13Is Samacsys:N
其他特性:3 ENABLE INPUTS系列:HCT
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.004 A湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:45 ns
传播延迟(tpd):45 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

MC74HCT138ADTR2 数据手册

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MC74HCT138A  
1−of−8 Decoder/  
Demultiplexer with LSTTL  
Compatible Inputs  
High−Performance Silicon−Gate CMOS  
http://onsemi.com  
The MC74HCT138A is identical in pinout to the LS138. The  
HCT138A may be used as a level converter for interfacing TTL or  
NMOS outputs to High Speed CMOS inputs.  
MARKING  
DIAGRAMS  
The HCT138A decodes a three−bit Address to one−of−eight  
active−lot outputs. This device features three Chip Select inputs, two  
active−low and one active−high to facilitate the demultiplexing,  
cascading, and chip−selecting functions. The demultiplexing function  
is accomplished by using the Address inputs to select the desired  
device output; one of the Chip Selects is used as a data input while the  
other Chip Selects are held in their active states.  
16  
PDIP−16  
N SUFFIX  
CASE 648  
MC74HCT138AN  
AWLYYWWG  
16  
1
1
16  
1
Features  
SOIC−16  
D SUFFIX  
CASE 751B  
HCT138AG  
AWLYWW  
16  
Output Drive Capability: 10 LSTTL Loads  
TTL/NMOS Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 mA  
1
16  
TSSOP−16  
DT SUFFIX  
CASE 948F  
HCT  
138  
ALYW  
16  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
Chip Complexity: 122 FETs or 30.5 Equivalent Gates  
Pb−Free Packages are Available*  
1
A
WL, L  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G
= Pb−Free Package  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
July, 2005 − Rev. 8  
MC74HCT138A/D  

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