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MC74HCT14ADTR2 PDF预览

MC74HCT14ADTR2

更新时间: 2024-11-21 21:02:51
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
6页 86K
描述
IC HCT SERIES, HEX 1-INPUT INVERT GATE, PDSO14, LEAD FREE, TSSOP-14, Gate

MC74HCT14ADTR2 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.18
系列:HCTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.004 A湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:48 ns
传播延迟(tpd):48 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

MC74HCT14ADTR2 数据手册

 浏览型号MC74HCT14ADTR2的Datasheet PDF文件第2页浏览型号MC74HCT14ADTR2的Datasheet PDF文件第3页浏览型号MC74HCT14ADTR2的Datasheet PDF文件第4页浏览型号MC74HCT14ADTR2的Datasheet PDF文件第5页浏览型号MC74HCT14ADTR2的Datasheet PDF文件第6页 
MC74HCT14A  
Hex Schmitt-Trigger  
Inverter with LSTTL  
Compatible Inputs  
High−Performance Silicon−Gate CMOS  
http://onsemi.com  
The MC74HCT14A may be used as a level converter for interfacing  
TTL or NMOS outputs to high−speed CMOS inputs.  
The HCT14A is useful to “square up” slow input rise and fall times.  
Due to the hysteresis voltage of the Schmitt trigger, the HCT14A finds  
applications in noisy environments.  
SOIC−14 NB  
D SUFFIX  
CASE 751A  
TSSOP−14  
DT SUFFIX  
CASE 948G  
Features  
Output Drive Capability: 10 LSTTL Loads  
TTL/NMOS−Compatible Input Levels  
PIN ASSIGNMENT  
A1  
Y1  
1
2
14  
V
CC  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
13 A6  
Low Input Current: 1.0 mA  
In Compliance With the JEDEC Standard No. 7.0 A Requirements  
Chip Complexity: 72 FETs or 18 Equivalent Gates  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
A2  
Y2  
3
4
12 Y6  
11 A5  
A3  
Y3  
5
6
7
10 Y5  
9
8
A4  
Y4  
GND  
These Devices are Pb−Free, Halogen Free and are RoHS Compliant  
MARKING DIAGRAMS  
14  
14  
LOGIC DIAGRAM  
HCT  
14A  
HCT14AG  
AWLYWW  
1
3
2
4
ALYWG  
A1  
A2  
A3  
A4  
A5  
A6  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
G
1
1
SOIC−14 NB  
TSSOP−14  
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
5
6
= Year  
W, WW = Work Week  
G or G  
= Pb−Free Package  
9
8
(Note: Microdot may be in either location)  
FUNCTION TABLE  
11  
10  
12  
Input  
A
Output  
Y
L
H
H
L
13  
Y = A  
PIN 14 = V  
CC  
PIN 7 = GND  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
October, 2014 − Rev. 14  
MC74HCT14A/D  

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