Datasheet > MC54HC534AJ

MC54HC534AJ

更新时间： 2024-10-15 00:01:07

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		触发器
页数	文件大小	规格书
8页	103K
描述
Octal 3-State Inverting D Flip-Flop

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数据手册

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MC54HC534AJ 数据手册

SEMICONDUCTOR TECHNICAL DATA

High–Performance Silicon–Gate CMOS

J SUFFIX

CERAMIC PACKAGE

CASE 732–03

The MC54/74HC534A is identical in pinout to the LS534. The device

inputs are compatible with standard CMOS outputs; with pullup resistors,

they are compatible with LSTTL outputs.

Data meeting the setup time is clocked, in inverted form, to the outputs

with the rising edge of the Clock. The Output Enable input does not affect the

states of the flip–flops, but when Output Enable is high, the outputs are

forced to the high impedance state. Thus, data may be stored even when the

outputs are not enabled.

N SUFFIX

PLASTIC PACKAGE

CASE 738–03

The HC534A is identical in function to the HC564 which has the data

inputs on the opposite side of the package from the outputs to facilitate PC

board layout.

This device is similar in function to the HC374A, which has noninverting

outputs.

DW SUFFIX

SOIC PACKAGE

CASE 751D–04

ORDERING INFORMATION

•

Output Drive Capability: 15 LSTTL Loads

Outputs Directly Interface to CMOS, NMOS and TTL

Operating Voltage Range: 2.0 to 6.0 V

MC54HCXXXAJ

MC74HCXXXAN

Ceramic

Plastic

SOIC

MC74HCXXXADW

Low Input Current: 1.0 µA

High Noise Immunity Characteristic of CMOS Devices

In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

PIN ASSIGNMENT

•

Chip Complexity: 282 FETs or 68.5 Equivalent Gates

OUTPUT

ENABLE

LOGIC DIAGRAM

DATA

INPUTS

INVERTING

OUTPUTS

GND

CLOCK

FUNCTION TABLE

Inputs

Output

CLOCK

Output

Enable Clock

PIN 20 = V

PIN 10 = GND

OUTPUT ENABLE

No Change

L,H,

X = Don’t Care

Z = High Impedance

3/97

REV 7

3–1

Motorola, Inc. 1997

12 3 4 5 6 7 8

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