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MC54HC365 PDF预览

MC54HC365

更新时间: 2024-11-14 11:08:55
品牌 Logo 应用领域
飞思卡尔 - FREESCALE /
页数 文件大小 规格书
6页 201K
描述
Hex 3-State Noninverting Buffer with Common Enables

MC54HC365 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
High–Performance Silicon–Gate CMOS  
16  
16  
The MC54/74HC365 is identical in pinout to the LS365. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
This device is a high–speed hex buffer with 3–state outputs and two  
common active–low Output Enables. When either of the enables is high, the  
buffer outputs are placed into high–impedance states. The HC365 has  
noninverting outputs.  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
1
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
DT SUFFIX  
TSSOP PACKAGE  
CASE 948F–01  
Low Input Current: 1 µA  
16  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
ORDERING INFORMATION  
Chip Complexity: 90 FETs or 22.5 Equivalent Gates  
MC54HCXXXJ  
Ceramic  
Plastic  
TSSOP  
MC74HCXXXN  
MC74HCXXXDT  
LOGIC DIAGRAM  
2
3
5
7
A0  
A1  
A2  
A3  
A4  
A5  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
PIN ASSIGNMENT  
OUTPUT  
4
1
2
16  
15  
V
CC  
OUTPUT  
ENABLE 2  
ENABLE 1  
A0  
6
Y0  
A1  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
A5  
Y5  
A4  
Y4  
A3  
Y3  
10  
12  
14  
9
Y1  
A2  
11  
13  
Y2  
GND  
1
15  
OUTPUT ENABLE 1  
OUTPUT ENABLE 2  
PIN 16 = V  
PIN 8 = GND  
CC  
FUNCTION TABLE  
Inputs  
Output  
Y
Enable Enable  
1
2
A
L
L
H
X
L
L
X
H
L
H
X
X
L
H
Z
Z
X = don’t care  
Z = high impedance  
10/95  
REV 6  
Motorola, Inc. 1995  

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