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MC14580BCPDS PDF预览

MC14580BCPDS

更新时间: 2024-09-09 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 存储内存集成电路静态存储器
页数 文件大小 规格书
7页 234K
描述
Memory IC, CMOS, PDIP24

MC14580BCPDS 技术参数

是否Rohs认证:不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
Is Samacsys:NJESD-30 代码:R-PDIP-T24
JESD-609代码:e0端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.6封装形状:RECTANGULAR
封装形式:IN-LINE电源:5/15 V
子类别:Other Memory ICs表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC14580BCPDS 数据手册

 浏览型号MC14580BCPDS的Datasheet PDF文件第2页浏览型号MC14580BCPDS的Datasheet PDF文件第3页浏览型号MC14580BCPDS的Datasheet PDF文件第4页浏览型号MC14580BCPDS的Datasheet PDF文件第5页浏览型号MC14580BCPDS的Datasheet PDF文件第6页浏览型号MC14580BCPDS的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 623  
The MC14580B is a 4 by 4 multiport register useful in small scratch pad  
memories, arithmetic operations when coupled with an adder, and other data  
storage applications. It allows independent reading of any two words (or the  
same word at both outputs) while writing into any one of four words.  
Address changing and data entry occur on the rising edge of the clock.  
When the write enable input is low, the contents of any word may be  
accessed but not altered.  
P SUFFIX  
PLASTIC  
CASE 709  
No Restrictions on Clock Input Rise or Fall Times  
3–State Outputs  
Single Phase Clocking  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or one Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin Compatible with CD40108  
DW SUFFIX  
SOIC  
CASE 751E  
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBDW  
Plastic  
Ceramic  
SOIC  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
T
A
= – 55° to 125°C for all packages.  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
V
DD  
– 0.5 to + 18.0  
V , V  
in out  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
PIN ASSIGNMENT  
I , I  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
Q3  
Q2  
1
2
3
4
5
6
24  
23  
22  
21  
20  
19  
V
DD  
B
Q1  
B
B
B
P
D
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
3–STATE A  
Q0  
T
stg  
– 65 to + 150  
260  
Q0  
Q1  
3–STATE B  
A
T
L
Lead Temperature (8–Second Soldering)  
C
D0  
D1  
A
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
Q2  
A
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
Q3  
7
18  
17  
16  
15  
14  
13  
D2  
A
WRITE 0  
WRITE 1  
8
D3  
BLOCK DIAGRAM  
9
CLOCK  
WE  
READ 1  
B
10  
11  
12  
W0 W1 R0 R1 R0 R1  
B
A
A
B
8
9
13 14 11 10  
READ 0  
READ 1  
READ 0  
B
A
V
SS  
A
16  
15  
CLOCK  
WE  
DECODER  
3–STATE A  
3
4
5
6
7
Q0  
Q1  
Q2  
A
A
A
WORD A  
OUTPUT  
20  
19  
18  
17  
D0  
D1  
D2  
D3  
Q3  
A
DATA  
INPUT  
4 X 4  
MEMORY  
22  
23  
2
Q0  
Q1  
Q2  
Q3  
B
B
B
WORD B  
OUTPUT  
1
B
21  
3–STATE B  
V
V
= PIN 24  
= PIN 12  
DD  
SS  
REV 3  
1/94  
Motorola, Inc. 1995  

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