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MC145828B PDF预览

MC145828B

更新时间: 2024-11-01 04:59:27
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
6页 106K
描述
LOOK-AHEAD CARRY BLOCK

MC145828B 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14582B is a CMOS look–ahead carry generator capable of  
anticipating a carry across four binary adders or groups of adders. The  
device is cascadable to perform full look–ahead across n–bit adders. Carry,  
generate–carry, and propagate–carry functions are provided as enumerated  
in the pin designation table shown below.  
P SUFFIX  
PLASTIC  
CASE 648  
Expandable to any Number of Bits  
All Buffered Outputs  
Low Power Dissipation  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–Power  
Schottky TTL Load over the Rated Temperature Range  
D SUFFIX  
SOIC  
CASE 751B  
ORDERING INFORMATION  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
V
DD  
– 0.5 to + 18.0  
T
A
= – 55° to 125°C for all packages.  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
I , I  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
PIN ASSIGNMENT  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
G1  
P1  
G0  
P0  
G3  
P3  
P
1
2
16  
15  
V
DD  
T
stg  
– 65 to + 150  
260  
P2  
G2  
T
Lead Temperature (8–Second Soldering)  
C
L
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
C
C
C
in  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
n+x  
n+y  
LOGIC EQUATIONS  
G
C
C
C
= G0 + (P0 C )  
n
n+x  
n+y  
n+z  
V
C
n+z  
SS  
= G1 + (P1 G0) + (P1 P0 C )  
n
= G2 + (P2 G1) + (P2 P1 G0) + (P2 P1 P0 C )  
n
G = G3 + (P3 G2) + (P3 P2 G1) + (P1 P2 P3 G0)  
P = P3 P2 P1 P0  
PIN DESIGNATIONS  
Designation  
Pin No’s  
Function  
G0, G1, G2, G3  
3, 1, 14, 5  
Active–Low  
Carry–Generate Inputs  
P0, P1, P2, P3  
4, 2, 15, 6  
Active–Low  
Carry–Propagate Inputs  
C
13  
Carry Input  
n
C
, C  
n+x n+y  
12, 11, 9  
Carry Outputs  
C
n+z  
G
10  
7
Active–Low Group  
Carry–Generate Output  
P
Active–Low Group  
Carry–Propagate Output  
REV 3  
1/94  
Motorola, Inc. 1995  

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