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MC14584

更新时间： 2024-10-31 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器
页数 文件大小 规格书
5页 162K
描述
Hex Schmitt Trigger

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MC14584 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 632  
The MC14584B Hex Schmitt Trigger is constructed with MOS P–channel  
and N–channel enhancement mode devices in a single monolithic structure.  
These devices find primary use where low power dissipation and/or high  
noise immunity is desired. The MC14584B may be used in place of the  
MC14069UB hex inverter for enhanced noise immunity to “square up” slowly  
changing waveforms.  
P SUFFIX  
PLASTIC  
CASE 646  
•
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load over the Rated Temperature Range  
Double Diode Protection on All Inputs  
D SUFFIX  
SOIC  
CASE 751A  
•
•
•
Can Be Used to Replace MC14069UB  
For Greater Hysteresis, Use MC14106B which is Pin–for–Pin  
Replacement for CD40106B and MM74Cl4  
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
T
A
= – 55° to 125°C for all packages.  
V
DD  
– 0.5 to + 18.0  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
I , I  
LOGIC DIAGRAM  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
1
3
2
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
T
stg  
– 65 to + 150  
260  
4
T
Lead Temperature (8–Second Soldering)  
C
L
* Maximum Ratings are those values beyond which damage to the device may occur.  
†Temperature Derating:  
5
6
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
9
8
11  
13  
10  
12  
EQIVALENT CIRCUIT SCHEMATIC  
(1/6 OF CIRCUIT SHOWN)  
V
V
= PIN 14  
= PIN 7  
DD  
SS  
This device contains protection circuitry to guard against damage  
due to high static voltages or electric fields. However, precautions must  
be taken to avoid applications of any voltage higher than maximum rated  
voltages to this high-impedance circuit. For proper operation, V and  
in  
V
out  
should be constrained to the range V  
SS  
≤ (V or V ) ≤ V .  
in out DD  
Unused inputs must always be tied to an appropriate logic voltage  
level (e.g., either V or V ). Unused outputs must be left open.  
SS DD  
REV 3  
1/94  
Motorola, Inc. 1995  
12345

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