The MC14584B Hex Schmitt Trigger is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14584B
may be used in place of the MC14069UB hex inverter for enhanced
noise immunity to “square up” slowly changing waveforms.
http://onsemi.com
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
MARKING
DIAGRAMS
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load over the Rated Temperature Range
• Double Diode Protection on All Inputs
14
PDIP–14
P SUFFIX
CASE 646
MC14584BCP
AWLYYWW
• Can Be Used to Replace MC14069UB
• For Greater Hysteresis, Use MC14106B which is Pin–for–Pin
1
Replacement for CD40106B and MM74Cl4
14
SOIC–14
D SUFFIX
CASE 751A
14584B
AWLYWW
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
1
SS
14
Symbol
Parameter
Value
Unit
V
V
DD
DC Supply Voltage Range
–0.5 to +18.0
TSSOP–14
DT SUFFIX
CASE 948G
14
584B
ALYW
V , V
in out
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
DD
1
I , I
Input or Output Current
(DC or Transient) per Pin
±10
mA
in out
14
1
SOEIAJ–14
F SUFFIX
CASE 965
P
D
Power Dissipation,
per Package (Note 3.)
500
mW
MC14584B
AWLYWW
T
A
Ambient Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
T
stg
A
= Assembly Location
T
L
Lead Temperature
(8–Second Soldering)
WL or L = Wafer Lot
YY or Y = Year
2. Maximum Ratings are those values beyond which damage to the device
may occur.
WW or W = Work Week
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
ORDERING INFORMATION
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
Device
Package
PDIP–14
SOIC–14
Shipping
MC14584BCP
MC14584BD
2000/Box
55/Rail
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
DD
.
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
MC14584BDR2
SOIC–14 2500/Tape & Reel
TSSOP–14 96/Rail
SS
DD
MC14584BDT
MC14584BDTEL TSSOP–14 2000/Tape & Reel
MC14584BF
SOEIAJ–14
SOEIAJ–14
See Note 1.
See Note 1.
MC14584BFEL
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14584B/D