SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14583B is a dual Schmitt trigger constructed with complementary
P–channel and N–channel MOS devices on a monolithic silicon substrate.
Each Schmitt trigger is functionally independent except for a common
3–state input and an internally–connected Exclusive OR output for use in
line receiver applications. Trigger levels are adjustable through the positive,
negative, and common terminals with the use of external resistors.
Applications include the speed–up of a slow waveform edge in interface
receivers, level detectors, etc.
P SUFFIX
PLASTIC
CASE 648
•
•
•
•
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Single Supply Operation
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Resistor Adjustable Trigger Levels
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
•
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
T
A
= – 55° to 125°C for all packages.
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
DD
– 0.5 to + 18.0
V
V , V
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
in out
I , I
BLOCK DIAGRAM
Input or Output Current (DC or Transient),
per Pin
± 10
mA
in out
6
5
7
V
V
= PIN 16
= PIN 8
DD
SS
P
Power Dissipation, per Package†
Storage Temperature
500
mW
C
D
T
stg
– 65 to + 150
260
A
A A
Neg Com
Pos
T
Lead Temperature (8–Second Soldering)
C
L
4
A
out
out
9
13
15
A
in
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
11
A
D
14
10
12
is
in
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
B
B
out
B
out
LOGIC DIAGRAM
B
B
B
Pos
Neg Com
POSITIVE A NEGATIVE A
6
5
7 COMMON A
2
3
1
A
9
in
4
A
A
out
TRUTH TABLE
Inputs
Outputs
11
out
A
B
Dis
A
A B B
out out out
3–STATE
OUTPUT DISABLE
out
13
15
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
Z
1
Z
1
0
0
1
1
Z
1
Z
0
0
0
1
1
14 EXCLUSIVE OR
1
1
1
1
0
0
1
1
0
1
0
1
1
1
1
1
Z
0
Z
0
0
0
1
1
Z
1
Z
0
1
1
0
0
B
10
12
B
B
in
out
Z = High impedance at output
out
1
COMMON B
V
V
= PIN 16
= PIN 8
DD
SS
2
POSITIVE B
3
NEGATIVE B
2
REV 3
1/94
Motorola, Inc. 1995
MOTOROLA CMOS LOGIC DATA
MC14583B
1