Datasheet > MC145532L

MC145532L

更新时间： 2024-09-18 22:58:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		转换器 PC
页数	文件大小	规格书
16页	223K
描述
ADPCM Transcoder

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中文翻译

获取价格

数据手册

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MC145532L 数据手册

Order this document

by MC145532/D

SEMICONDUCTOR TECHNICAL DATA

Conforms to G.721–1988 and T1.301–1987

DW SUFFIX

SOG PACKAGE

CASE 751G

The MC145532 Adaptive Differential Pulse Code Modulation (ADPCM)

Transcoder provides a low–cost, full–duplex, single–channel transcoder to

(from) a 64 kbps PCM channel from (to) either a 16 kbps, 24 kbps, 32 kbps, or

64 kbps channel.

•

Complies with CCITT Recommendation G.721–1988

Complies with the American National Standard (T1.301–1987)

Full–Duplex, Single–Channel Operation

Mu–Law or A–Law Coding is Pin Selectable

Synchronous or Asynchronous Operation

Easily Interfaces with Any Member of Motorola’s PCM Codec–Filter

Mono–Circuit Family or Other Industry Standard Codec

Serial PCM and ADPCM Data Transfer Rate from 64 kbps to 5.12 Mbps

Power–Down Capability for Low Current Consumption

The Reset State, an Option Specified in the Standards, is Automatically

Initiated When the RESET Pin is Released

L SUFFIX

CERAMIC PACKAGE

CASE 620

ORDERING INFORMATION

MC145532DW SOG Package

MC145532L Ceramic Package

•

PIN ASSIGNMENT

•

Simple Time Slot Assignment Timing for Transcoder Applications

Single 5 V Power Supply

16–Pin Package

The MC145536EVK is the Evaluation Platform for the MC145532 and Also

Includes the MC145480 5 V PCM Codec–Filter

MODE

DDO

DOE

DDC

DDI

EDO

EOE

EDC

EDI

DIE

EIE

RESET

SPC

APD

BLOCK DIAGRAM

DDO

EDO

EDE

I/O DATA BUS

DOE

REG

S REG

LATCH

REG

S REG

DDC

DDI

EDC

EDI

DIGITAL

SIGNAL

PROCESSOR

LATCH

DIE

EIE

RESET

SPC

MODE

APD

REV 1

9/95 (Replaces NP470)

Motorola, Inc. 1995

MOTOROLA

MC145532

12 3 4 5 6 7...16

中文翻译

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