MC14554

更新时间： 2024-11-09 22:58:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
6页	173K
描述
2-Bit by 2-Bit Parallel Binary Multiplier

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中文翻译

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数据手册

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MC14554 数据手册

SEMICONDUCTOR TECHNICAL DATA

L SUFFIX

CERAMIC

CASE 620

The MC14554B 2 x 2–bit parallel binary multiplier is constructed with

complementary MOS (CMOS) enhancement mode devices. The multiplier

can perform the multiplication of two binary numbers and simultaneously add

two other binary numbers to the product. The MC14554B has two

multiplicand inputs (X0 and X1), two multiplier inputs (Y0 and Y1), five

cascading or adding inputs (K0, K1, M0, M1, and M2), and five sum and

carry outputs (S0, S1, S2, C1 [S3], and C0). The basic multiplier can be

expanded into a straightforward m–bit by n–bit parallel multiplier without

additional logic elements.

P SUFFIX

PLASTIC

CASE 648

D SUFFIX

SOIC

Application areas include arithmetic processing (multiplying/adding,

obtaining square roots, polynomial evaluation, obtaining reciprocals, and

dividing), Fast Fourier Transform processing, digital filtering, communica-

tions (convolution and correlation), and process and machine controls.

CASE 751B

ORDERING INFORMATION

MC14XXXBCP

MC14XXXBCL

MC14XXXBD

Plastic

Ceramic

SOIC

•

Diode Protection on All Inputs

All Outputs Buffered

Straight–forward m–Bit By n–Bit Expansion

No Additional Logic Elements Needed for Expansion

Multiplies and Adds Simultaneously

= – 55° to 125°C for all packages.

This device contains protection circuitry to

guard against damage due to high static

voltages or electric fields. However, pre-

cautions must be taken to avoid applications of

any voltage higher than maximum rated volt-

ages to this high–impedance circuit. For proper

Positive Logic Design

Supply Voltage Range = 3.0 Vdc to 18 Vdc

Capable of Driving Two Low–Power TTL Loads or One Low–Power

Schottky TTL Load Over the Rated Temperature Range

MAXIMUM RATINGS* (Voltages Referenced to V

)

operation, V and V

should be constrained

in out

Symbol

Parameter

DC Supply Voltage

Value

Unit

to the range V

(V or V

SS in out

)

Unused inputs must always be tied to an

appropriate logic voltage level (e.g., either V

– 0.5 to + 18.0

V , V

Input or Output Voltage (DC or Transient)

– 0.5 to V

+ 0.5

or V ). Unused outputs must be left open.

in out

I , I

in out

Input or Output Current (DC or Transient),

per Pin

± 10

Power Dissipation, per Package†

Storage Temperature

500

– 65 to + 150

260

EQUATIONS

S = (X x Y) + K + M

stg

Where:

Lead Temperature (8–Second Soldering)

x Means Arithmetic Times.

+ Means Arithmetic Plus.

S = S3 S2 S1 S0, X = X1X0, Y = Y1Y0,

K = K1 K0, M = M1 M0 (Binary Numbers).

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C

Example:

Given: X = 2(1), Y = 3(11)

K = 1(01), M = 2(10)

PIN ASSIGNMENT

Then: S = (2 x 3) + 1 + 2 = 9

S = (10 x 11) + 01 + 10 = 1001

NOTE: C0 connected to M2 for this size

multiplier. See general expansion

diagram for other size multipliers.

C1 (S3)

REV 3

1/94

Motorola, Inc. 1995

MOTOROLA CMOS LOGIC DATA

MC14554B

12 3 4 5 6

中文翻译

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与MC14554相关器件

型号	品牌	获取价格	描述	数据表
MC145540	MOTOROLA	获取价格	ADPCM CODEC
MC145540 ADPCM编码器	ETC	获取价格
MC145540DW	MOTOROLA	获取价格	A/MU-LAW, ADPCM CODEC, PDSO28, PLASTIC, SOG-28
MC145540DWR2	MOTOROLA	获取价格	A/MU-LAW, ADPCM CODEC, PDSO28, PLASTIC, SOG-28
MC145540P	MOTOROLA	获取价格	ADPCM Codec, A/MU-Law, 1-Func, CMOS, PDIP28, PLASTIC, DIP-28
MC145541PB	MOTOROLA	获取价格	A/MU-LAW, ADPCM CODEC, PQFP44, 10 X 10 MM, TQFP-44
MC145542	MOTOROLA	获取价格	Framer, PQFP64, PLASTIC, QFP-64
MC14554B	MOTOROLA	获取价格	2-Bit by 2-Bit Parallel Binary Multiplier
MC14554BAL	MOTOROLA	获取价格	4000/14000/40000 SERIES, 2-BIT MULTIPLIER, CDIP16, 620-09
MC14554BALD	MOTOROLA	获取价格	Multiplier, 4000/14000/40000 Series, 2-Bit, CMOS, CDIP16, 620-09

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