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MC14099B PDF预览

MC14099B

更新时间: 2024-11-04 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
8页 188K
描述
8-Bit Addressable Latches

MC14099B 数据手册

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The MC14099B is an 8–bit addressable latch. Data is entered in  
serial form when the appropriate latch is addressed (via address pins  
A0, A1, A2) and write disable is in the low state. For the MC14099B  
the input is a unidirectional write only port.  
The data is presented in parallel at the output of the eight latches  
independently of the state of Write Disable, Write/Read or Chip  
Enable.  
http://onsemi.com  
MARKING  
DIAGRAMS  
A Master Reset capability is available on both parts.  
16  
Serial Data Input  
Parallel Output  
Master Reset  
PDIP–16  
P SUFFIX  
CASE 648  
MC14099BCP  
AWLYYWW  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–Power  
Schottky TTL Load over the Rated Temperature Range  
MC14099B pin for pin compatible with CD4099B  
1
16  
14099B  
SOIC–16  
DW SUFFIX  
CASE 751G  
AWLYYWW  
1
16  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
SOEIAJ–16  
F SUFFIX  
CASE 966  
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
MC14099B  
AWLYWW  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
1
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
P
D
Power Dissipation,  
per Package (Note 3.)  
500  
mW  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
ORDERING INFORMATION  
T
Lead Temperature  
L
(8–Second Soldering)  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
MC14099BCP  
MC14099BDW  
2000/Box  
2350/Box  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
MC14099BDWR2 SOIC–16  
1000/Tape & Reel  
See Note 1.  
See Note 1.  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high–impedancecircuit. For proper operation, V and V should be constrained  
MC14099BF  
SOEIAJ–16  
SOEIAJ–16  
MC14099BFEL  
in  
out  
to the range V  
(V or V  
)
V
.
SS  
in  
out  
DD  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14099B/D  

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