MC14051B, MC14052B,
MC14053B
Analog
Multiplexers/Demultiplexers
The MC14051B, MC14052B, and MC14053B analog multiplexers
are digitally−controlled analog switches. The MC14051B effectively
implements an SP8T solid state switch, the MC14052B a DP4T, and
the MC14053B a Triple SPDT. All three devices feature low ON
impedance and very low OFF leakage current. Control of analog
signals up to the complete supply voltage range can be achieved.
http://onsemi.com
MARKING
DIAGRAMS
16
1
PDIP−16
P SUFFIX
CASE 648
MC140xxBCP
AWLYYWW
Features
• Triple Diode Protection on Control Inputs
• Switch Function is Break Before Make
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Analog Voltage Range (V − V ) = 3.0 to 18 V
16
SOIC−16
D SUFFIX
CASE 751B
DD
EE
140xxB
AWLYWW
Note: V must be v V
EE
SS
• Linearized Transfer Characteristics
1
• Low−noise − 12 nV/√Cycle, f ≥ 1.0 kHz Typical
• Pin−for−Pin Replacement for CD4051, CD4052, and CD4053
• For 4PDT Switch, See MC14551B
16
14
0xxB
ALYW
TSSOP−16
DT SUFFIX
CASE 948F
• For Lower R , Use the HC4051, HC4052, or HC4053 High−Speed
ON
CMOS Devices
1
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
16
1
Symbol
Parameter
Value
Unit
SOEIAJ−16
F SUFFIX
CASE 966
MC140xxB
AWLYWW
V
DD
DC Supply Voltage Range
−0.5 to
+18.0
V
(Referenced to V , V ≥ V )
EE
EE
SS
V ,
Input or Output Voltage Range
(DC or Transient) (Referenced to V for
−0.5 to V
+ 0.5
V
in
DD
V
out
SS
Control Inputs and V for Switch I/O)
EE
xx
A
WL, L
YY, Y
= Specific Device Code
= Assembly Location
= Wafer Lot
I
in
Input Current (DC or Transient) per Control Pin
Switch Through Current
+10
±25
500
mA
mA
mW
I
SW
= Year
P
D
Power Dissipation per Package (Note 1)
Ambient Temperature Range
WW, W = Work Week
T
A
−55 to +125 °C
−65 to +150 °C
T
stg
Storage Temperature Range
T
L
Lead Temperature (8−Second Soldering)
260
°C
ORDERING INFORMATION
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From
65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained to
in
out
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either
V , V or V ). Unused outputs must be left open.
SS EE DD
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
February, 2005 − Rev. 6
MC14051B/D
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