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MC14043BD PDF预览

MC14043BD

更新时间: 2024-11-11 22:34:03
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 锁存器
页数 文件大小 规格书
6页 221K
描述
CMOS MSI Quad R-S Latches

MC14043BD 技术参数

生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.2系列:4000/14000/40000
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:R-S LATCH最大I(ol):0.00088 A
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:5/15 VProp。Delay @ Nom-Sup:350 ns
传播延迟(tpd):350 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
触发器类型:HIGH LEVEL宽度:3.9 mm
Base Number Matches:1

MC14043BD 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
Quad R–S Latches  
The MC14043B and MC14044B quad R–S latches are constructed with  
MOS P–channel and N–channel enhancement mode devices in a single  
monolithic structure. Each latch has an independent Q output and set and  
reset inputs. The Q outputs are gated through three–state buffers having a  
common enable input. The outputs are enabled with a logical “1” or high on  
the enable input; a logical “0” or low disconnects the latch from the Q  
outputs, resulting in an open circuit at the Q outputs.  
L SUFFIX  
CERAMIC  
CASE 620  
P SUFFIX  
PLASTIC  
CASE 648  
Double Diode Input Protection  
Three–State Outputs with Common Enable  
Outputs Capable of Driving Two Low–power TTL Loads or One Low–  
Power Schottky TTL Load Over the Rated Temperature Range  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
D SUFFIX  
SOIC  
CASE 751B  
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
T
A
= – 55° to 125°C for all packages.  
MC14043B  
MC14044B  
4
4
2
9
13  
S0  
R0  
Q0  
Q1  
Q2  
Q3  
Q0  
3
6
3
6
R0  
S1  
S0  
R1  
9
Q1  
7
7
V
V
= PIN 16  
= PIN 8  
V
V
= PIN 16  
= PIN 8  
DD  
SS  
DD  
SS  
R1  
S2  
S1  
R2  
12  
12  
NC = PIN 13  
NC = PIN 2  
10  
10  
Q2  
Q3  
11  
14  
11  
14  
R2  
S3  
S2  
R3  
TRUTH TABLE  
TRUTH TABLE  
1
1
S R E  
Q
S R E  
Q
X
X
0
High  
X X  
0
High  
Impedance  
Impedance  
15  
5
15  
5
R3  
S3  
0
0
1
1
0
1
0
1
1 No Change  
0
0
1
1
0
1
0
1
1
1
1
0
1
0
1
1
1
0
1
1
1 No Change  
ENABLE  
ENABLE  
X = Don’t Care  
X = Don’t Care  
REV 3  
1/94  
Motorola, Inc. 1995  

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