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MC14043BFELG PDF预览

MC14043BFELG

更新时间： 2024-11-12 12:32:59
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 143K
描述
CMOS MSI Quad R−S Latches

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MC14043BFELG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：ROHS COMPLIANT, EIAJ, PLASTIC, SOIC-16针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.34Is Samacsys：N
系列：4000/14000/40000JESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：10.2 mm
负载电容（CL）：50 pF逻辑集成电路类型：R-S LATCH
湿度敏感等级：3位数：4
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：5/15 V
Prop。Delay @ Nom-Sup：350 ns传播延迟（tpd）：350 ns
认证状态：Not Qualified座面最大高度：2.05 mm
子类别：FF/Latches最大供电电压 (Vsup)：18 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
触发器类型：HIGH LEVEL宽度：5.275 mm
Base Number Matches：1

MC14043BFELG 数据手册

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MC14043B, MC14044B  
CMOS MSI  
Quad R−S Latches  
The MC14043B and MC14044B quad R−S latches are constructed  
with MOS P−Channel and N−Channel enhancement mode devices in a  
single monolithic structure. Each latch has an independent Q output  
and set and reset inputs. The Q outputs are gated through three−state  
buffers having a common enable input. The outputs are enabled with a  
logical “1” or high on the enable input; a logical “0” or low  
disconnects the latch from the Q outputs, resulting in an open circuit at  
the Q outputs.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
1
PDIP−16  
P SUFFIX  
CASE 648  
MC140xxBCP  
AWLYYWWG  
Features  
• Double Diode Input Protection  
• Three−State Outputs with Common Enable  
• Outputs Capable of Driving Two Low−power TTL Loads or One  
Low−Power Schottky TTL Load Over the Rated Temperature  
Range  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• These Devices are Pb−Free and are RoHS Compliant  
16  
SOIC−16  
D SUFFIX  
CASE 751B  
140xxBG  
AWLYWW  
1
• NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
16  
SOEIAJ−16  
F SUFFIX  
CASE 966  
MC14043B  
ALYWG  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
1
V
DD  
DC Supply Voltage Range  
xx  
A
WL, L  
YY, Y  
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
DD  
= Year  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
± 10  
mA  
WW, W = Work Week  
= Pb−Free Indicator  
G
P
D
Power Dissipation, per Package  
(Note 1)  
500  
mW  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
T
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
T
Lead Temperature  
L
(8−Second Soldering)  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
© Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
April, 2013 − Rev. 9  
MC14043B/D  
 
1234567

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MC14043BFELG 替代型号

型号 品牌 替代类型 描述 数据表
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