MC14044B

更新时间： 2024-10-31 22:36:19

品牌	Logo	应用领域
安森美 - ONSEMI		锁存器
页数	文件大小	规格书
8页	196K
描述
CMOS MSI(Quad R-S Latches)

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中文翻译

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数据手册

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MC14044B 数据手册

Quad R–S Latches

The MC14043B and MC14044B quad R–S latches are constructed

with MOS P–channel and N–channel enhancement mode devices in a

single monolithic structure. Each latch has an independent Q output

and set and reset inputs. The Q outputs are gated through three–state

buffers having a common enable input. The outputs are enabled with a

logical “1” or high on the enable input; a logical “0” or low

disconnects the latch from the Q outputs, resulting in an open circuit at

the Q outputs.

http://onsemi.com

MARKING

DIAGRAMS

PDIP–16

P SUFFIX

CASE 648

MC140XXBCP

AWLYYWW

• Double Diode Input Protection

• Three–State Outputs with Common Enable

• Outputs Capable of Driving Two Low–power TTL Loads or One

Low–Power Schottky TTL Load Over the Rated Temperature Range

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

SOIC–16

D SUFFIX

CASE 751B

140XXB

AWLYWW

MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)

SOEIAJ–16

F SUFFIX

CASE 966

MC140XXB

AWLYWW

Symbol

Parameter

Value

Unit

DC Supply Voltage Range

–0.5 to +18.0

V , V

Input or Output Voltage Range

(DC or Transient)

–0.5 to V + 0.5

in out

= Specific Device Code

= Assembly Location

I , I

in out

Input or Output Current

(DC or Transient) per Pin

±10

WL or L = Wafer Lot

YY or Y = Year

WW or W = Work Week

Power Dissipation,

per Package (Note 3.)

500

Ambient Temperature Range

Storage Temperature Range

–55 to +125

–65 to +150

260

°C

ORDERING INFORMATION

stg

Device

Package

PDIP–16

SOIC–16

Shipping

Lead Temperature

(8–Second Soldering)

MC14043BCP

MC14043BD

2000/Box

2400/Box

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

MC14043BDR2

SOIC–16 2500/Tape & Reel

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

MC14043BF

MC14043BFEL

MC14044BCP

MC14044BD

SOEIAJ–16

PDIP–16

See Note 1.

2000/Box

This device contains protection circuitry to guard against damage due to high

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high–impedancecircuit. For proper operation, V and V should be constrained

out

to the range V

(V or V

)

out

Unused inputs must always be tied to an appropriate logic voltage level (e.g.,

either V or V ). Unused outputs must be left open.

SOIC–16

2400/Box

MC14044BDR2

SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of

the SOIC packages, please contact your local

ON Semiconductor representative.

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 3

MC14043B/D

12 3 4 5 6 7 8

中文翻译

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与MC14044B相关器件

型号	品牌	获取价格	描述	数据表
MC14044BAL	MOTOROLA	获取价格	4000/14000/40000 SERIES, LOW LEVEL TRIGGERED R-S LATCH, TRUE OUTPUT, CDIP16, 620-09
MC14044BALD	MOTOROLA	获取价格	4000/14000/40000 SERIES, LOW LEVEL TRIGGERED R-S LATCH, TRUE OUTPUT, CDIP16, 620-09
MC14044BALDS	MOTOROLA	获取价格	暂无描述
MC14044BALS	MOTOROLA	获取价格	R-S Latch, 4-Func, 1-Bit, CMOS, CDIP16
MC14044BCL	MOTOROLA	获取价格	CMOS MSI Quad R-S Latches
MC14044BCLDS	MOTOROLA	获取价格	R-S Latch, 4000/14000/40000 Series, 1-Func, Low Level Triggered, 4-Bit, True Output, CMOS,
MC14044BCLS	ROCHESTER	获取价格	R-S Latch
MC14044BCP	ONSEMI	获取价格	CMOS MSI(Quad R-S Latches)
MC14044BCP	MOTOROLA	获取价格	CMOS MSI Quad R-S Latches
MC14044BCP	ROCHESTER	获取价格	R-S Latch, 4000/14000/40000 Series, 1-Func, Low Level Triggered, 4-Bit, True Output, CMOS,

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