SEMICONDUCTOR TECHNICAL DATA
The MC10H180 is a high–speed, low–power, general–purpose adder/
subtractor. It is designed to be used in special purpose adders/subtractors or in
high–speed multiplier arrays.
Inputs for each adder are Carry–in, Operand A, and Operand B; outputs are
Sum, Sum and Carry–out. The common select inputs serve as a control line to
Invert A for subtract, and a control line to Invert B.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
•
•
•
Propagation Delay, 1.8 ns Typical, Operand and Select to Output
Power Dissipation, 360 mW Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
FN SUFFIX
PLCC
CASE 775–02
•
•
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Vdc
Vdc
mA
LOGIC DIAGRAM
Power Supply (V
= 0)
V
EE
–8.0 to 0
CC
7
9
5
SEL
SEL
AO
S0
S0
15
2
A
B
Input Voltage (V
= 0)
V
I
0 to V
CC
EE
Output Current— Continuous
— Surge
I
out
50
100
6
4
BO
Operating Temperature Range
T
A
0 to +75
°C
C
3
C
OUT
IN
Storage Temperature Range— Plastic
— Ceramic
T
–55 to +150
–55 to +165
°C
°C
stg
SEL
SEL
A1
S1
S1
14
1
A
B
ELECTRICAL CHARACTERISTICS (V
0°
= –5.2 V ±5%) (See Note)
EE
25°
75°
11
10
12
B1
Characteristic
Symbol Min
Max
Min
Max
Min
Max
Unit
C
13
C
OUT
IN
Power Supply Current
I
E
—
95
—
86
—
95
mA
Input Current High
Pins 4, 12
Pins 7, 9
I
µA
inH
V
V
= PIN 16
= PIN 8
CC
EE
—
—
—
665
515
410
—
—
—
417
320
255
—
—
—
417
320
255
Pins 5, 6, 10, 11
POSITIVE LOGIC ONLY
A’ =
B’ =
A
B
C
C
SEL = A SEL
A
A
B
Input Current Low
I
0.5
—
0.5
—
0.3
—
µA
inL
SEL = B SEL
B
High Output Voltage
Low Output Voltage
High Input Voltage (1)
Low Input Voltage (1)
AC PARAMETERS
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
OH
S
=
(A’ B’ + A’ B’) +
(A’ B’ + A’ B’)
IN
IN
V
OL
C
= C A’ + C B’ + A’ B’
OUT
IN
IN
V
IH
V
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45
Vdc
IL
DIP
PIN ASSIGNMENT
Propagation Delay
Operand to Output
Select to Output
t
pd
ns
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1
S0
V
CC
0.6
0.6
0.4
2.4
2.2
1.6
0.7
0.7
0.4
2.5
2.3
1.7
0.8
0.8
0.4
2.8
2.6
1.8
S0
S1
Carry–in to Output
COUT
Rise Time
t
r
0.5
0.5
2.0
2.0
0.5
0.5
2.1
2.1
0.5
0.5
2.2
2.2
ns
ns
C
C
C
IN
OUT
Fall Time
t
f
A0
B0
IN
NOTES:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit
board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a
50–ohm resistor to –2.0 volts.
A1
SEL
B1
A
SEL
V
B
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
Motorola, Inc. 1996
REV 5
2–271