MC10H180L

更新时间： 2024-11-03 22:58:11

品牌	Logo	应用领域
安森美 - ONSEMI		逻辑集成电路输出元件
页数	文件大小	规格书
4页	116K
描述
Dual 2 Bit Adder/Subtractor

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中文翻译

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数据手册

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MC10H180L 数据手册

The MC10H180 is a high–speed, low–power, general–purpose

adder/ subtractor. It is designed to be used in special purpose

adders/subtractors or in high–speed multiplier arrays.

Inputs for each adder are Carry–in, Operand A, and Operand B;

outputs are Sum, Sum and Carry–out. The common select inputs serve

as a control line to Invert A for subtract, and a control line to Invert B.

• Propagation Delay, 1.8 ns Typical, Operand and Select to Output

• Power Dissipation, 360 mW Typicalh180

• Improved Noise Margin 150 mV (Over Operating Voltage and

Temperature Range)

http://onsemi.com

MARKING

DIAGRAMS

CDIP–16

L SUFFIX

CASE 620

MC10H180L

AWLYYWW

• Voltage Compensated

• MECL 10K–Compatible

LOGIC DIAGRAM

PDIP–16

P SUFFIX

CASE 648

MC10H180P

AWLYYWW

SEL

OUT

PLCC–20

FN SUFFIX

CASE 775

10H180

SEL

AWLYYWW

SEL

= Assembly Location

OUT

WL = Wafer Lot

YY = Year

WW = Work Week

= PIN 16

= PIN 8

POSITIVE LOGIC ONLY

A’ = A SEL = A SEL

ORDERING INFORMATION

B’ = B SEL = B SEL

S = C (A’ B’ + A’ B’) +

Device

Package

Shipping

(A’ B’ + A’ B’)

= C A’ + C B’ + A’ B’

MC10H180L

CDIP–16

25 Units/Rail

OUT IN IN

DIP PIN ASSIGNMENT

MC10H180P

PDIP–16

PLCC–20

25 Units/Rail

46 Units/Rail

MC10H180FN

COUT

OUT

SEL

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 6

MC10H180/D

12 3 4

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