SEMICONDUCTOR TECHNICAL DATA
The MC10H136 is a high speed synchronous hexadecimal counter. This
10H part is a functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in counting frequency and no increase in
power-supply current.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
•
•
•
Counting Frequency, 250 MHz Minimum
Power Dissipation, 625 mW Typical
Improved Noise Margin 150 mV
•
•
Voltage Compensated
MECL 10K-Compatible
(Over Operating Voltage and Temperature Range)
FN SUFFIX
PLCC
CASE 775–02
MAXIMUM RATINGS
FUNCTION SELECT TABLE
Characteristic
= 0)
Symbol
Rating
Unit
Vdc
Vdc
mA
CIN
X
S1 S2
Operating Mode
Preset (Program)
Increment (Count Up)
Hold Count
Power Supply (V
Input Voltage (V
V
–8.0 to 0
L
L
L
H
H
L
CC
= 0)
EE
V
I
0 to V
EE
L
CC
Output Current — Continuous
— Surge
I
50
100
H
L
out
L
H
H
H
Decrement (Count Down)
Hold Count
Operating Temperature Range
T
A
0 to +75
°C
H
L
Storage Temperature Range — Plastic
— Ceramic
T
–55 to +150
–55 to +165
°C
°C
stg
X
H
Hold (Stop Count)
SEQUENTIAL TRUTH TABLE *
INPUTS OUTPUTS
ELECTRICAL CHARACTERISTICS (V
= –5.2 V ±5%) (See Note)
EE
0°
25°
75°
Carry Clock
Carry
Out
S1 S2 D0 D1 D2 D3
Q0 Q1 Q2 Q3
In
* *
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
L
L
L
L
L
H
H
H
L
X
X
X
L
X
X
X
H
X
X
X
H
X
X
X
X
L
L
L
H
H
H
H
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
L
H
H
L
Power Supply Current
I
—
165
—
150
—
165
mA
E
Input Current High
Pins 5, 6, 11, 12, 13
Pin 9
I
µA
inH
H
—
—
—
—
430
670
535
380
—
—
—
—
275
420
335
240
—
—
—
—
275
420
335
240
X
X
X
X
X
X
X
X
X
X
X
X
L
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
X
X
H
Pin 7
Pin 10
H
L
H
L
L
L
L
L
H
H
H
H
H
H
H
H
L
H
L
H
H
H
L
L
H
H
L
H
L
L
L
L
H
H
L
H
X
X
X
X
H
X
X
X
X
L
X
X
X
X
L
X
X
X
X
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
I
0.5
—
0.5
—
0.3
—
µA
inL
H
H
H
H
L
L
L
L
L
L
L
H
H
H
L
V
–1.02 –0.84 –0.98 –0.81 –0.92
–1.95 –1.63 –1.95 –1.63 –1.95
–1.17 –0.84 –1.13 –0.81 –1.07
–1.95 –1.48 –1.95 –1.48 –1.95
–0.735
–1.60
Vdc
Vdc
Vdc
Vdc
OH
V
OL
H
H
V
–0.735
–1.45
IH
*
Truth table shows logic states assuming inputs vary in
sequence shown from top to bottom.
** A clock H is defined as a clock input transition from a
low to a high logic level.
V
IL
AC PARAMETERS
Propagation Delay
Clock to Q
Clock to Carry Out
Carry in to Carry
Out
t
ns
ns
ns
pd
DIP PIN ASSIGNMENT
0.7
1.0
2.3
4.8
0.7
1.0
2.4
4.9
0.7
1.0
2.5
5.0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
C
V
CC2
CC1
Q2
0.7
2.5
0.7
2.6
0.7
2.7
Q1
Set-up Time
Data (D0 to C)
Select (S to C)
t
set
2.0
3.5
2.0
0
—
—
—
—
2.0
3.5
2.0
0
—
—
—
—
2.0
3.5
2.0
0
—
—
—
—
Q3
Q0
Carry In (C to C)
CLOCK
D0
in
OUT
D3
(C to C
)
in
Hold Time
t
hold
D1
D2
S2
Data (C to D0)
Select (C to S)
Carry In (C to C
0
–0.5
0
—
—
—
—
0
–0.5
0
—
—
—
—
0
–0.5
0
—
—
—
—
C
IN
)
in
(C to C)
2.2
2.2
2.2
S1
V
in
EE
Counting Frequency
Rise Time
f
250
0.5
0.5
—
250
0.5
0.5
—
250
0.5
0.5
—
MHz
ns
count
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
t
2.3
2.3
2.4
2.4
2.5
2.5
r
Fall Time
t
f
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal
equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts.
9/96
Motorola, Inc. 1996
REV 6
2–1
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