SEMICONDUCTOR TECHNICAL DATA
The MC10H141 is a four–bit universal shift register. This device is a
functional/pinout duplication of the standard MECL 10K part with 100%
improvement in propagation delay and operation frequency and no increase in
power supply current.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
•
•
•
Shift frequency, 250 MHz Min
Power Dissipation, 425 mW Typical
Improved Noise Margin 150 mV (over operating voltage and
temperature range)
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
•
•
Voltage Compensated
MECL 10K–Compatible
FN SUFFIX
PLCC
CASE 775–02
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Vdc
Vdc
mA
Power Supply (V
= 0)
V
EE
–8.0 to 0
CC
TRUTH TABLE
Input Voltage (V
= 0)
V
I
0 to V
50
CC
EE
OUTPUTS
SELECT
S1 S2
OPERATING
MODE
Output Current— Continuous
— Surge
I
out
Q0
n + 1
Q1
Q2
Q3
n + 1
n + 1
n + 1
D2
100
L
L
Parallel Entry
D0
Q1
D1
D3
Operating Temperature Range
T
0 to +75
°C
A
L
H
L
Shift Right*
Shift Left*
Q2
Q0
Q3
n
DR
Q2
n
n
Storage Temperature Range— Plastic
— Ceramic
T
stg
–55 to +150
–55 to +165
°C
°C
H
DL
Q0
Q1
n
n
n
H
H
Stop Shift
Q1
Q2
n
32
n
n
n
ELECTRICAL CHARACTERISTICS (V
0°
= –5.2 V ±5%)
25°
*
Outputs as exist after pulse appears at “C” input with
input conditions as shown (Pulse Positive transition of
clock input).
EE
75°
Characteristic
Symbol Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
I
E
—
112
—
102
—
112
mA
DIP
PIN ASSIGNMENT
Input Current High
Pins 5,6,9,11,12,13
Pins 7,10
I
µA
inH
—
—
—
405
416
510
—
—
—
255
260
320
—
—
—
255
260
320
V
V
CC2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC1
Pin 4
Q1
Q0
DL
D0
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
I
0.5
—
0.5
—
0.3
—
µA
Q2
inL
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc
OH
Q3
C
V
OL
V
IH
DR
D3
S2
V
IL
D1
S1
D2
AC PARAMETERS
Propagation Delay
t
1.0
1.0
2.0
—
1.0
1.0
2.0
—
1.1
1.0
2.1
—
ns
ns
pd
Hold Time —
Data, Select
t
hold
V
EE
Set–up Time
Data
Select
t
ns
set
Pin assignment is for Dual–in–Line Package.
1.5
3.0
—
—
1.5
3.0
—
—
1.5
3.0
—
—
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
Rise Time
Fall Time
t
r
0.5
0.5
250
2.4
2.4
—
0.5
0.5
250
2.4
2.4
—
0.5
0.5
250
2.4
2.4
—
ns
ns
t
f
Shift Frequency
f
MHz
shift
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50 ohm resistor to –2.0 volts.
9/96
Motorola, Inc. 1996
REV 6
2–131